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TDA8260 Datasheet(PDF) 10 Page - NXP Semiconductors |
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TDA8260 Datasheet(HTML) 10 Page - NXP Semiconductors |
10 / 23 page 2004 Sep 03 10 Philips Semiconductors Product specification Satellite Zero-IF QPSK/8PSK downconverter with PLL synthesizer TDA8260TW LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134); see note 1. Note 1. Maximum ratings cannot be exceeded, not even momentarily, without causing irreversible damage to the IC. Maximum ratings cannot be accumulated. THERMAL CHARACTERISTICS HANDLING Inputs and outputs are protected against electrostatic discharge in normal handling. However it is good practice to take normal precautions appropriate to handling MOS devices (see “Handling MOS devices”). ESD specification: • Every pin withstands 2000 V in the ESD test in accordance with JEDEC specification EIA/JESD-A114A, HBM model (category 2); except pins SCL (pin 36), VT (pin 33) and VCC(RF) (pin 8). • Identically every pin withstands 200 V in the ESD test in accordance with JEDEC specification EIA/JESD22-A115A, MM model (category B); except pins TKA (pin 30) and TKB (pin 29). SYMBOL PARAMETER MIN. MAX. UNIT VCC supply voltage −0.3 +6.0 V Vi(max); Vo(max) maximum input or output voltage on all pins except SDA, SCL and VT −0.3 VCC + 0.3 V Vi(SDA); Vo(SDA) data input or data output voltage −0.3 +6.0 V Vi(SCL) clock input voltage −0.3 +6.0 V Vo(tune) tuning voltage output −0.3 +35 V Tamb ambient temperature −20 +85 °C Tstg IC storage temperature −40 +150 °C Tj(max) maximum junction temperature − 150 °C tsc(max) maximum short-circuit time; each pin; short-circuit to VCC or GND − 10 s SYMBOL PARAMETER CONDITIONS VALUE UNIT Rth(j-a) thermal resistance from junction to ambient in free air 39 K/W |
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