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t

Low

High

Minimum

On-Time

to Enable

the Device

(500 ms)

Minimum

Off-Time

to Disable

the Device

(32 ms)

TPS61042

SLVS441B — DECEMBER 2002 — REVISED JANUARY 2003

CONTROL (CTRL)

The CTRL pin serves two functions. One is the enable and disable of the device. The other is the PWM control of

the internal LED switch (Q2). If no PWM signal is applied to the CTRL pin, then the CTRL pin can be used as a

standard enable pin for the device. To enable the device, the CTRL pin must be pulled high for time period of at

least 500 µs. The device starts with the softstart cycle. Pulling the CTRL pin to GND for a time period

≥32 ms

disables the device, disconnecting the LEDs from GND by opening the LED switch (Q2) to avoid any LED

leakage current. See Figure 16 for the CTRL pin timing.

The internal LED switch (Q2) is driven by the PWM signal when applied to the CTRL pin. Applying a PWM signal

in the range of 100 Hz to 50 kHz allows the LED current to be pulsed with the duty cycle of the PWM signal. The

CTRL pin accepts a PWM duty cycle from D = 1% to 100%. Duty cycles below 1% are also possible with the

restriction that the device is forced into shutdown as the off time of the applied PWM signal exceeds 10 ms.

When a PWM signal is applied to the CTRL pin the LED switch (Q2) turns on immediately. The internal error

comparator is disabled for 400 ns. This 400 ns delay time is required to establish the correct voltage level across

To achieve good LED current accuracy and linearity, the switching frequency of the converter must be higher

than the PWM frequency applied to the CTRL pin.

Figure 16. CTRL Timing Diagram

The CTRL timing diagram is shown in Figure 16. To enable the device, the CTRL signal must be high for 500 µs.

shutdown mode, the CTRL signal must be low for at least 32 ms. Requiring the CTRL pin to be low for 32mS

before the device enters shutdown allows for PWM dimming frequencies as low as 100 Hz. The device is

enabled again when a CTRL signal is high for a period of 500 µs minimum. See Figure 11 for the PWM duty

cycle versus LED current characteristic.

This CTRL pin must be terminated.

OVERVOLTAGE PROTECTION (OVP)

As with any current source, the output voltage rises as the output impedance increases or is disconnected. To

prevent the output voltage from exceeding the maximum main switch (Q1) voltage rating of 30 V, an overvoltage

protection circuit is integrated. When the output voltage exceeds the OVP threshold voltage, (Q1) turns off. The

converter switch remains off until the output voltage falls below the OVP threshold voltage. As long as the output

voltage is below the OVP threshold the converter continues its normal operation, until the output voltage exceeds

the OVP threshold again.

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