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UCC5631AMWPTR Datasheet(PDF) 6 Page - Texas Instruments

Part # UCC5631AMWPTR
Description  Multimode SCSI 9 Line Terminator
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

UCC5631AMWPTR Datasheet(HTML) 6 Page - Texas Instruments

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UCC5631A
UNITRODE CORPORATION
7 CONTINENTAL BLVD. • MERRIMACK, NH 03054
TEL. (603) 424-2410 • FAX (603) 424-3460
The DIFSENS line is monitored by each terminator
through a 50Hz noise filter at the DIFFB input pin. A set
of comparators detect and select the appropriate termi-
nation for the bus as follows. If the DIFSENS signal is be-
low 0.5V, the termination network is SE. Between 0.7V
and 1.9V, the termination network switches to LVD, and
above 2.4V is HVD, causing the terminators to discon-
nect from the bus. The thresholds accommodate differ-
ences in ground potential that can occur with long lines.
Three UCC5631A multi-mode parts are required at each
end of the bus to terminate 27 (18 data, plus 9 control)
lines. Each part includes a DIFSENS driver, but only one
is necessary to drive the line. A MSTR/SLV input pin is
provided to disable the other two. The "master" part must
have its' MSTR/SLV pin connected to TRMPWR and the
two "slave" parts must have the MSTR/SLV inputs
grounded. Only the "master" is connected directly to the
SCSI bus DIFSENS line. The DIFFB inputs on all three
parts are connected together, allowing them to share the
same 50Hz noise filter. This multi-mode terminator oper-
ates in full specification down to 2.7V TRMPWR voltage.
This accommodates 3.3V systems, with allowance for the
3.3V supply tolerance (+/- 10%), a unidirectional fusing
device and cable drop. In 3.3V TRMPWR systems, the
UCC3912 is recommended in place of the fuse and di-
ode. The UCC3912's lower voltage drop allows additional
margin over the fuse and diode, for the far end termina-
tor.
Layout is critical for Ultra2 and Ultra3 systems. The SPI-2
standard for capacitance loading is 10pF maximum from
each positive and negative signal line to ground, and a
maximum of 5pF between the positive and negative sig-
nal lines of each pair is allowed. These maximum capaci-
tances apply to differential bus termination circuitry that
is not part of a SCSI device, (e.g. a cable terminator). If
the termination circuitry is included as part of a SCSI de-
vice, (e.g., a host adaptor, disk or tape drive), then the
corresponding requirements are 30pF maximum from
each positive and negative signal line to ground and
15pF maximum between the positive and negative signal
lines of each pair.
The SPI-2 standard for capacitance balance of each pair
and balance between pairs is more stringent. The stan-
dard is 0.75pF maximum difference from the positive and
negative signal lines of each pair to ground. An additional
requirement is a maximum difference of 2pF when com-
paring pair to pair. These requirements apply to differen-
tial bus termination circuitry that is not part of a SCSI
device. If the termination circuitry is included as part of a
device, then the corresponding balance requirements are
2.25pF maximum difference within a pair, and 3pF from
pair to pair.
Feed-throughs,
through-hole
connections,
and
etch
lengths
need
to
be
carefully
balanced. Standard
multi-layer power and ground plane spacing add about
1pF to each plane. Each feed-through will add about
2.5pF to 3.5pF. Enlarging the clearance holes on both
power and ground planes will reduce the capacitance.
Similarly, opening up the power and ground planes under
the
connector
will
reduce
the
capacitance
for
through-hole connector applications. Capacitance
will
also be affected by components, in close proximity,
above and below the circuit board.
Unitrode multi-mode terminators are designed with very
tight balance, typically 0.1pF between pins in a pair and
0.3pF between pairs. At each L+ pin, a ground driver
drives the pin to ground, while in single ended mode. The
ground driver is specially designed to not effect the ca-
pacitive balance of the bus when the device is in LVD or
disconnect mode.
Multi-layer boards need to adhere to the 120
imped-
ance standard, including the connectors and feed-
throughs. This is normally done on the outer layers with
4 mil etch and 4 mil spacing between runs within a pair,
and a minimum of 8 mil spacing to the adjacent pairs to
reduce crosstalk. Microstrip technology is normally too
low of impedance and should not be used. It is designed
for 50
rather than 120
differential systems. Careful
consideration must be given to the issue of heat man-
agement. A multi-mode terminator, operating in SE
mode, will dissipate as much as 130mW of instanta-
neous power per active line with TRMPWR = 5.25V. The
UCC5631A is offered in a 36 pin SSOP and a 48 lead
LFQP. Both packages include heat sink ground pins.
These heat sink/ground pins are directly connected to
the die mount paddle under the die and conduct heat
from the die to reduce the junction temperature. All of the
HS/GND pins need to be connected to etch area or a
feed-through per pin connecting to the ground plane
layer on a multi-layer board.
APPLICATION INFORMATION (cont.)


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