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TMS320DM6467TCUTL1 Datasheet(PDF) 5 Page - Texas Instruments |
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TMS320DM6467TCUTL1 Datasheet(HTML) 5 Page - Texas Instruments |
5 / 352 page JTAGInterface SystemControl PLLs/Clock Generator Input Clock(s) Power/Sleep Controller Pin Multiplexing ARMSubsystem ARM926EJ-SCPU 16KB I-Cache 32KBRAM 8KB D-Cache 8KBROM DSP Subsystem C64x DSP CPU ™ 32KB L1Pgm 128KBL2RAM 32KB L1Data HighDefinition Video-Imaging Coprocessor (HDVICP0) SwitchedCentralResource(SCR) Peripherals EDMA I2C SPI UART SerialInterfaces DDR2 MemCtlr (16b/32b) AsyncEMIF/ NAND/ SmartMedia ATA Program/DataStorage Watchdog Timer PWM System General- Purpose Timer USB2.0 PHY VLYNQ EMAC With MDIO Connectivity HPI McASP Video PortI/F PCI (66MHz) TSIF HighDefinition Video-Imaging Coprocessor (HDVICP1) CRGEN VDCE TMS320DM6467T www.ti.com SPRS605C – JULY 2009 – REVISED JUNE 2012 1.3 Functional Block Diagram Figure 1-1 shows the functional block diagram of the device. Figure 1-1. TMS320DM6467T Functional Block Diagram Copyright © 2009–2012, Texas Instruments Incorporated Digital Media System-on-Chip (DMSoC) 5 Submit Documentation Feedback Product Folder Link(s): TMS320DM6467T |
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