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TMS28F400AST80BDBJE Datasheet(PDF) 8 Page - Texas Instruments |
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TMS28F400AST80BDBJE Datasheet(HTML) 8 Page - Texas Instruments |
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8 / 80 page  TMS28F004Axy, TMS28F400Axy 524288 BY 8-BIT/ 262144 BY 16-BIT AUTOSELECT BOOT BLOCK FLASH MEMORIES SMJS829A − JANUARY 1996 − REVISED AUGUST 1997 8 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 boot-block data protection The 16K-byte boot block can be used to store key system data that is seldom changed in normal operation. Data in this block can be secured by using different combinations of the reset / power-down pin (RP), the write protect pin (WP) and VPP supply levels. Table 2 provides a list of these combinations. parameter block Two parameter blocks of 8K bytes each can be used like a scratch pad to store frequently updated data. Alternatively, the parameter blocks can be used for additional boot- or main-block data. If a parameter block is used to store additional boot-block data, caution must be exercised because the parameter block does not have the boot-block data-protection safety feature. main block Primary memory on the TMS28F400Axy is located in four main blocks. Three of the blocks have storage capacity for 128K bytes and the fourth block has storage capacity for 96K bytes. data protection Data is secured or unsecured by using different combinations of the reset / power-down pin (RP), the write protect pin (WP), and VPP supply levels. Table 2 provides a list of these combinations. There are two configurations to secure the entire memory against inadvertant alteration of data. The VPP supply pin can be held below the VPP lock-out voltage level (VPPLK) or the reset/deep power-down pin (RP) can be pulled to a logic-low level. Note if RP is held low, the device resets which means it powers down and, therefore, cannot be read. Typically this pin tied to the system reset for additional protection during system power up. The boot block sector has an additional security feature through the WP pin (’ASy, ’AEy, and ’AFy device configurations only). When the RP pin is at a logic-high level, the WP pin controls whether the boot block sector is protected. When WP is held at the logic-low level, the boot block is protected. When WP is held at the logic-high level, the boot block is unprotected along with the rest of the other sectors. Alternatively, the entire memory for all voltage configurations can be unprotected by pulling the RP pin to VHH (12 V). Table 2. Data-Protection Combinations ’ASy, ’AEy, OR ’AFy ’AMy OR ’AZy DATA PROTECTION PROVIDED VPP RP WP† VPP RP WP† All blocks locked VIL X X VIL X X All blocks locked (reset) X VIL X X VIL X All blocks unlocked >VPPLK VHH X VHH VHH X >VPPLK VIH VIH Only boot block locked >VPPLK VIH VIL VHH VIH X † For the TMS28F400AZy and TMS28F400AMy 12-V VPP-only products, the WP pin is disabled and can be left floating. To unlock blocks, RP must be at VHH. command-state machine (CSM) Commands are issued to the CSM using standard microprocessor write timings. The CSM acts as an interface between the external microprocessor and the internal WSM. The available commands are listed in Table 3 and the descriptions of these commands are shown in Table 4. When a program or erase command is issued to the CSM, the WSM controls the internal sequences and the CSM responds only to status reads. After the WSM completes its task, the WSM status bit (SB7) is set to a logic-high level (1), allowing the CSM to respond to the full command set again. |
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