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TMS320C6678AGYPA Datasheet(PDF) 4 Page - Texas Instruments |
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TMS320C6678AGYPA Datasheet(HTML) 4 Page - Texas Instruments |
4 / 247 page 4 TMS320C6678 Features and Description Copyright 2014 Texas Instruments Incorporated SPRS691E—March 2014 Multicore Fixed and Floating-Point Digital Signal Processor TMS320C6678 Submit Documentation Feedback 1.5 Functional Block Diagram Figure 1-1 shows the functional block diagram of the TMS320C6678 device. Figure 1-1 Functional Block Diagram 8 Cores @ up to 1.4 GHz Power Management Debug & Trace Boot ROM Semaphore Packet DMA Multicore Navigator Queue Manager ´3 PLL EDMA ´3 4MB MSM SRAM 64-Bit DDR3 EMIF Memory Subsystem MSMC C66x™ CorePac 32KB L1 P-Cache 32KB L1 D-Cache 512KB L2 Cache C66x™ CorePac 32KB L1 P-Cache 32KB L1 D-Cache 512KB L2 Cache C66x™ CorePac 32KB L1 P-Cache 32KB L1 D-Cache 512KB L2 Cache C66x™ CorePac 32KB L1 P-Cache 32KB L1 D-Cache 512KB L2 Cache C66x™ CorePac 32KB L1 P-Cache 32KB L1 D-Cache 512KB L2 Cache C66x™ CorePac 32KB L1 P-Cache 32KB L1 D-Cache 512KB L2 Cache C66x™ CorePac 32KB L1 P-Cache 32KB L1 D-Cache 512KB L2 Cache C66x™ CorePac 32KB L1 P-Cache 32KB L1 D-Cache 512KB L2 Cache TeraNet HyperLink TeraNet Network Coprocessor Packet Accelerator Security Accelerator 6678 |
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