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TMS320C6712 Datasheet(PDF) 2 Page - Texas Instruments |
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TMS320C6712 Datasheet(HTML) 2 Page - Texas Instruments |
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2 / 116 page  TMS320C6712, TMS320C6712C FLOATINGPOINT DIGITAL SIGNAL PROCESSORS SPRS148M − AUGUST 2000 − REVISED NOVEMBER 2005 2 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 Table of Contents IEEE 1149.1 JTAG compatibility statement 62 . . . . . . . . . . EMIF device speed 63 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . bootmode 64 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . reset 64 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . absolute maximum ratings over operating case temperature range 65 . . . . . . . . . . . . . . . . . . . . . . . . . . recommended operating conditions 65 . . . . . . . . . . . . . . . . electrical characteristics over recommended ranges of supply voltage and operating case temperature 66 . parameter measurement information 67 . . . . . . . . . . . . . . . signal transition levels 68 . . . . . . . . . . . . . . . . . . . . . . . . . . timing parameters and board routing analysis 70 . . . . . . input and output clocks 72 . . . . . . . . . . . . . . . . . . . . . . . . . . . asynchronous memory timing 77 . . . . . . . . . . . . . . . . . . . . . synchronous-burst memory timing 80 . . . . . . . . . . . . . . . . . synchronous DRAM timing 82 . . . . . . . . . . . . . . . . . . . . . . . . HOLD/HOLDA timing 88 . . . . . . . . . . . . . . . . . . . . . . . . . . . . BUSREQ timing 89 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . reset timing [C6712] 90 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . reset timing [C6712C] 92 . . . . . . . . . . . . . . . . . . . . . . . . . . . . external interrupt timing 94 . . . . . . . . . . . . . . . . . . . . . . . . . . multichannel buffered serial port timing 95 . . . . . . . . . . . . . timer timing 109 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . general-purpose input/output (GPIO) port timing [C6712C only] 110 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . JTAG test-port timing 111 . . . . . . . . . . . . . . . . . . . . . . . . . . . . mechanical data [C6712/12C] 112 . . . . . . . . . . . . . . . . . . . . revision history 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GFN BGA package (bottom view) [C6712 only] 5 . . . . . . . . . . GDP BGA package (bottom view) [C6712C only] 5 . . . . . . . . description 6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . device characteristics 7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . device compatibility 8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . functional block and CPU (DSP core) diagram 9 . . . . . . . . . . . CPU (DSP core) description 10 . . . . . . . . . . . . . . . . . . . . . . . . . memory map summary 12 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . peripheral register descriptions 13 . . . . . . . . . . . . . . . . . . . . . . . signal groups description 18 . . . . . . . . . . . . . . . . . . . . . . . . . . . . device configurations 20 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . terminal functions 23 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . development support 36 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . device support 37 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . CPU CSR register description 40 . . . . . . . . . . . . . . . . . . . . . . . . interrupt sources and interrupt selector [C6712 only] 42 . . . . interrupt sources and interrupt selector [12C only] 43 . . . . . . . EDMA channel synchronization events [C6712 only] 44 . . . . EDMA module and EDMA selector [12C only] 45 . . . . . . . . . . clock PLL [C6712 only] 47 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PLL and PLL controller [C6712C only] 49 . . . . . . . . . . . . . . . . . general-purpose input/output (GPIO) 56 . . . . . . . . . . . . . . . . . . power-down mode logic 57 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . power-supply sequencing 59 . . . . . . . . . . . . . . . . . . . . . . . . . . . . power-supply decoupling 61 . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
Similar Part No. - TMS320C6712 |
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Similar Description - TMS320C6712 |
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