TPS70345, TPS70348, TPS70351, TPS70358, TPS70302

DUAL-OUTPUT LOW-DROPOUT VOLTAGE REGULATORS

WITH POWER UP SEQUENCING FOR SPLIT VOLTAGE DSP SYSTEMS

SLVS285A – AUGUST 2000 – REVISED OCTOBER 2002

6

POST OFFICE BOX 655303

Terminal Functions

TERMINAL

I/O

DESCRIPTION

NAME

NO.

I/O

DESCRIPTION

EN

7

I

Active low enable

GND

9

Regulator ground

GND/HEATSINK

1, 12, 13, 24

Ground/heatsink

MR1

6

I

Manual reset input 1, active low, pulled up internally

MR2

5

I

Manual reset input 2, active low, pulled up internally

NC

4, 17, 20

No connection

PG1

19

O

Open drain output, low when VOUT1 voltage is less than 95% of the nominal regulated voltage

RESET

18

O

Open drain output, SVS (power on reset) signal, active low

SEQ

8

I

Power up sequence control: SEQ=High, VOUT2 powers up first; SEQ=Low, VOUT1 powers up first,

SEQ terminal pulled up internally.

VIN1

2, 3

I

Input voltage of regulator 1

VIN2

10, 11

I

Input voltage of regulator 2

VOUT1

22, 23

O

Output voltage of regulator 1

VOUT2

14, 15

O

Output voltage of regulator 2

VSENSE2/FB2

16

I

Regulator 2 output voltage sense/ regulator 2 feedback for adjustable

VSENSE1/FB1

21

I

Regulator 1 output voltage sense/ regulator 1 feedback for adjustable

detailed description

The TPS703xx low dropout regulator family provides dual regulated output voltages for DSP applications that

require a high performance power management solution. These devices provide fast transient response and

high accuracy, while drawing low quiescent current. Programmable sequencing provides a power solution for

DSPs without any external component requirements. This reduces the component cost and board space while

increasing total system reliability. TPS703xx family has an enable feature which puts the device in sleep mode

reducing the input current to 1

µA. Other features are the integrated SVS (power on reset, RESET) and power

good (PG1). These monitor output voltages and provide logic output to the system. These differentiated features

provide a complete DSP power solution.

The TPS703xx, unlike many other LDOs, features very low quiescent current which remains virtually constant

even with varying loads. Conventional LDO regulators use a PNP pass element, the base current of which is

to pass current. Because the gate of the PMOS is voltage driven, operating current is low and stable over the

full load range.

pin functions

enable

The EN terminal is an input which enables or shuts down the device. If EN is at a logic high signal the device

is in shutdown mode. When the EN goes to voltage low, then the device is enabled.

sequence

refer to Figures 33 through 39.