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TMX320VC5504CZCH Datasheet(PDF) 3 Page - Texas Instruments |
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TMX320VC5504CZCH Datasheet(HTML) 3 Page - Texas Instruments |
3 / 123 page PLL/Clock Generator Power Management Pin Multiplexing JTAGInterface C55x™ DSP CPU 64KBDARAM 192KBSARAM 128KBROM SwitchedCentralResource(SCR) I S (x4) 2 I C 2 SPI UART SerialInterfaces USB2.0 PHY (HS) [DEVICE] Connectivity Peripherals Input Clock(s) DMA (x4) Interconnect DSP System GP Timer (x2) System RTC GP Timer and/orWD NAND,NOR, SRAM Program/DataStorage MMC/SD (x2) TMS320VC5504 www.ti.com SPRS609B – JUNE 2009 – REVISED JANUARY 2010 1.3 Functional Block Diagram Figure 1-1 shows the functional block diagram of the VC5504 device. Figure 1-1. TMS320VC5504 Functional Block Diagram Copyright © 2009–2010, Texas Instruments Incorporated Fixed-Point Digital Signal Processor 3 Submit Documentation Feedback Product Folder Link(s): TMS320VC5504 |
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