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TMS320VC5509AZHHR Datasheet(PDF) 11 Page - Texas Instruments |
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TMS320VC5509AZHHR Datasheet(HTML) 11 Page - Texas Instruments |
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11 / 145 page  Tables 11 November 2002 − Revised January 2008 SPRS205K Table Page 5−1 Recommended Crystal Parameters 88 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−2 CLKIN Timing Requirements 90 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−3 CLKOUT Switching Characteristics 90 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−4 Multiply-By-N Clock Option Timing Requirements 91 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−5 Multiply-By-N Clock Option Switching Characteristics 91 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−6 Recommended RTC Crystal Parameters 92 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−7 Asynchronous Memory Cycle Timing Requirements 93 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−8 Asynchronous Memory Cycle Switching Characteristics 93 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−9 Synchronous DRAM Cycle Timing Requirements 96 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−10 Synchronous DRAM Cycle Switching Characteristics 96 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−11 Power-Up Reset (On-Chip Oscillator Active) Timing Requirements 104 . . . . . . . . . . . . . . . . . . . . . . . . . 5−12 Power-Up Reset (On-Chip Oscillator Inactive) Timing Requirements 105 . . . . . . . . . . . . . . . . . . . . . . . . 5−13 Power-Up Reset (On-Chip Oscillator Inactive) Switching Characteristics 105 . . . . . . . . . . . . . . . . . . . . 5−14 Reset Timing Requirements 106 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−15 Reset Switching Characteristics 106 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−16 External Interrupt Timing Requirements 107 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−17 Wake-Up From IDLE Switching Characteristics 107 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−18 XF Switching Characteristics 108 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−19 GPIO Pins Configured as Inputs Timing Requirements 109 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−20 GPIO Pins Configured as Outputs Switching Characteristics 109 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−21 TIN/TOUT Pins Configured as Inputs Timing Requirements 110 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−22 TIN/TOUT Pins Configured as Outputs Switching Characteristics 110 . . . . . . . . . . . . . . . . . . . . . . . . . . 5−23 McBSP0 Timing Requirements 111 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−24 McBSP0 Switching Characteristics 112 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−25 McBSP1 and McBSP2 Timing Requirements 113 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−26 McBSP1 and McBSP2 Switching Characteristics 114 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−27 McBSP as SPI Master or Slave Timing Requirements (CLKSTP = 10b, CLKXP = 0) 116 . . . . . . . . . . 5−28 McBSP as SPI Master or Slave Switching Characteristics (CLKSTP = 10b, CLKXP = 0) 116 . . . . . . 5−29 McBSP as SPI Master or Slave Timing Requirements (CLKSTP = 11b, CLKXP = 0) 118 . . . . . . . . . . 5−30 McBSP as SPI Master or Slave Switching Characteristics (CLKSTP = 11b, CLKXP = 0) 118 . . . . . . . 5−31 McBSP as SPI Master or Slave Timing Requirements (CLKSTP = 10b, CLKXP = 1) 120 . . . . . . . . . . 5−32 McBSP as SPI Master or Slave Switching Characteristics (CLKSTP = 10b, CLKXP = 1) 120 . . . . . . 5−33 McBSP as SPI Master or Slave Timing Requirements (CLKSTP = 11b, CLKXP = 1) 122 . . . . . . . . . . 5−34 McBSP as SPI Master or Slave Switching Characteristics (CLKSTP = 11b, CLKXP = 1) 122 . . . . . . . 5−35 McBSP General-Purpose I/O Timing Requirements 124 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−36 McBSP General-Purpose I/O Switching Characteristics 124 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−37 EHPI Timing Requirements 125 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−38 EHPI Switching Characteristics 125 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−39 I2C Signals (SDA and SCL) Timing Requirements 131 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−40 I2C Signals (SDA and SCL) Switching Characteristics 133 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−41 MultiMedia Card (MMC) Timing Requirements 134 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−42 MultiMedia Card (MMC) Switching Characteristics 134 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−43 Secure Digital (SD) Card Timing Requirements 135 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−44 Secure Digital (SD) Card Switching Characteristics 135 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−45 Universal Serial Bus (USB) Characteristics 136 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5−46 ADC Characteristics 138 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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