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TMS320VC5410APGE16 Datasheet(PDF) 4 Page - Texas Instruments |
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TMS320VC5410APGE16 Datasheet(HTML) 4 Page - Texas Instruments |
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4 / 99 page  TMS320VC5410A Fixed-Point Digital Signal Processor SPRS139I – NOVEMBER 2000 – REVISED OCTOBER 2008 www.ti.com 4 Support ............................................................................................................................. 53 4.1 Documentation Support ................................................................................................... 53 4.2 Device and Development-Support Tool Nomenclature ................................................................ 54 5 Electrical Specifications ...................................................................................................... 55 5.1 Absolute Maximum Ratings ............................................................................................... 55 5.2 Recommended Operating Conditions ................................................................................... 55 5.3 Electrical Characteristics Over Recommended Operating Case Temperature Range (Unless Otherwise Noted) ........................................................................................ 56 5.4 Test Load Circuit ........................................................................................................... 56 5.5 Timing Parameter Symbology ............................................................................................ 57 5.6 Internal Oscillator With External Crystal ................................................................................. 58 5.7 Clock Options ............................................................................................................... 59 5.7.1 Divide-By-Two and Divide-By-Four Clock Options .......................................................... 59 5.7.2 Multiply-By-N Clock Option (PLL Enabled) ................................................................... 61 5.8 Memory and Parallel I/O Interface Timing .............................................................................. 62 5.8.1 Memory Read .................................................................................................... 62 5.8.2 Memory Write .................................................................................................... 65 5.8.3 I/O Read .......................................................................................................... 67 5.8.4 I/O Write ......................................................................................................... 69 5.9 Ready Timing for Externally Generated Wait States .................................................................. 70 5.10 HOLD and HOLDA Timings ............................................................................................... 73 5.11 Reset, BIO, Interrupt, and MP/MC Timings ............................................................................. 74 5.12 Instruction Acquisition (IAQ) and Interrupt Acknowledge (IACK) Timings .......................................... 76 5.13 External Flag (XF) and TOUT Timings .................................................................................. 77 5.14 Multichannel Buffered Serial Port (McBSP) Timing .................................................................... 78 5.14.1 McBSP Transmit and Receive Timings ....................................................................... 78 5.14.2 McBSP General-Purpose I/O Timing ......................................................................... 81 5.14.3 McBSP as SPI Master or Slave Timing ...................................................................... 82 5.15 Host-Port Interface Timing ................................................................................................ 86 5.15.1 HPI8 Mode ....................................................................................................... 86 5.15.2 HPI16 Mode ...................................................................................................... 90 6 Mechanical Data ................................................................................................................. 93 6.1 Package Thermal Resistance Characteristics .......................................................................... 93 4 Contents Submit Documentation Feedback |
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