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TMS570LS1114 Datasheet(PDF) 5 Page - Texas Instruments |
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TMS570LS1114 Datasheet(HTML) 5 Page - Texas Instruments |
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5 / 169 page  TMS570LS1114 www.ti.com SPNS188B – OCTOBER 2012 – REVISED FEBRUARY 2015 Table of Contents 1 Device Overview ......................................... 1 6.9 Device Memory Map ................................ 69 1.1 Features .............................................. 1 6.10 Flash Memory ....................................... 75 1.2 Applications ........................................... 2 6.11 Tightly Coupled RAM Interface Module ............. 78 1.3 Description ............................................ 2 6.12 Parity Protection for Accesses to Peripheral RAMs 78 1.4 Functional Block Diagram ............................ 4 6.13 On-Chip SRAM Initialization and Testing ........... 80 2 Revision History ......................................... 6 6.14 External Memory Interface (EMIF) .................. 82 3 Device Comparison ..................................... 8 6.15 Vectored Interrupt Manager ......................... 90 4 Terminal Configuration and Functions ............. 9 6.16 DMA Controller ...................................... 94 4.1 PGE QFP Package Pinout (144-Pin) ................. 9 6.17 Real Time Interrupt Module ......................... 96 4.2 ZWT BGA Package Ball-Map (337 Ball Grid Array) 10 6.18 Error Signaling Module .............................. 98 4.3 Terminal Functions ................................. 11 6.19 Reset / Abort / Error Sources ...................... 102 5 Specifications .......................................... 41 6.20 Digital Windowed Watchdog ....................... 105 5.1 Absolute Maximum Ratings Over Operating Free- 6.21 Debug Subsystem ................................. 106 Air Temperature Range ............................ 41 7 Peripheral Information and Electrical 5.2 ESD Ratings ........................................ 41 Specifications ......................................... 111 5.3 Power-On Hours (POH) ............................. 41 7.1 Enhanced Translator PWM Modules (ePWM) ..... 111 5.4 Device Recommended Operating Conditions ....... 42 7.2 Enhanced Capture Modules (eCAP) ............... 116 5.5 Switching Characteristics Over Recommended 7.3 Enhanced Quadrature Encoder (eQEP) ........... 118 Operating Conditions for Clock Domains ........... 43 7.4 Multibuffered 12bit Analog-to-Digital Converter .... 119 5.6 Wait States Required ............................... 43 7.5 General-Purpose Input/Output ..................... 131 5.7 Power Consumption Over Recommended 7.6 Enhanced High-End Timer (N2HET) .............. 132 Operating Conditions ................................ 44 7.7 Controller Area Network (DCAN) .................. 136 5.8 Input/Output Electrical Characteristics Over 7.8 Local Interconnect Network Interface (LIN) ........ 137 Recommended Operating Conditions ............... 45 7.9 Serial Communication Interface (SCI) ............. 138 5.9 Thermal Resistance Characteristics ................ 45 7.10 Inter-Integrated Circuit (I2C) ....................... 139 5.10 Output Buffer Drive Strengths ...................... 46 7.11 Multibuffered / Standard Serial Peripheral 5.11 Input Timings ........................................ 47 Interface ............................................ 142 5.12 Output Timings ...................................... 47 8 Device and Documentation Support .............. 154 5.13 Low-EMI Output Buffers ............................ 49 8.1 Device and Development-Support Tool 6 System Information and Electrical Nomenclature ...................................... 154 Specifications ........................................... 50 8.2 Documentation Support ............................ 156 6.1 Device Power Domains ............................. 50 8.3 Trademarks ........................................ 156 6.2 Voltage Monitor Characteristics ..................... 50 8.4 Electrostatic Discharge Caution ................... 156 6.3 Power Sequencing and Power On Reset ........... 52 8.5 Glossary ............................................ 156 6.4 Warm Reset (nRST) ................................. 54 8.6 Device Identification ................................ 157 6.5 ARM Cortex-R4F CPU Information ................. 55 8.7 Module Certifications ............................... 159 6.6 Clocks ............................................... 58 9 Mechanical Packaging and Orderable 6.7 Clock Monitoring .................................... 66 Information ............................................. 164 6.8 Glitch Filters ......................................... 68 9.1 Packaging Information ............................. 164 Copyright © 2012–2015, Texas Instruments Incorporated Table of Contents 5 Submit Documentation Feedback Product Folder Links: TMS570LS1114 |
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