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TMS320LC548PGE-66 Datasheet(PDF) 2 Page - Texas Instruments

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Part # TMS320LC548PGE-66
Description  FIXED-POINT DIGITAL SIGNAL PROCESSORS
Download  118 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TMS320LC548PGE-66 Datasheet(HTML) 2 Page - Texas Instruments

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TMS320C54x, TMS320LC54x, TMS320VC54x
FIXED-POINT DIGITAL SIGNAL PROCESSORS
SPRS039C – FEBRUARY 1996 – REVISED DECEMBER 1999
2
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
description
The TMS320C54x, TMS320LC54x, and TMS320VC54x fixed-point, digital signal processor (DSP) families
(hereafter referred to as the ’54x unless otherwise specified) are based on an advanced modified Harvard
architecture that has one program memory bus and three data memory buses. These processors also provide
an arithmetic logic unit (ALU) that has a high degree of parallelism, application-specific hardware logic, on-chip
memory, and additional on-chip peripherals. These DSP families also provide a highly specialized instruction
set, which is the basis of the operational flexibility and speed of these DSPs.
Separate program and data spaces allow simultaneous access to program instructions and data, providing the
high degree of parallelism. Two reads and one write operation can be performed in a single cycle. Instructions
with parallel store and application-specific instructions can fully utilize this architecture. In addition, data can be
transferred between data and program spaces. Such parallelism supports a powerful set of arithmetic, logic,
and bit-manipulation operations that can all be performed in a single machine cycle. In addition, the ’C54x,
’LC54x, and ’VC54x versions include the control mechanisms to manage interrupts, repeated operations, and
function calls.
Table 1 provides an overview of the ’54x generation of DSPs. The table shows significant features of each
device including the capacity of on-chip RAM and ROM memories, the peripherals, the execution time of one
machine cycle, and the type of package with its total pin count.
Table 1. Characteristics of the ’54x Processors
DSP TYPE
NOMINAL
ON-CHIP
MEMORY
PERIPHERALS
CYCLE
PACKAGE TYPE
DSP TYPE
NOMINAL
VOLTAGE (V)
RAM†
(Word)
ROM
(Word)
SERIAL
PORT
TIMER
HPI
CYCLE
TIME (ns)
PACKAGE TYPE
TMS320C541
5.0
5K
28K‡
1
No
25
100-pin TQFP
TMS320LC541
3.3
5K
28K‡
1
No
20/25
100-pin TQFP
TMS320LC541B
h
3.3
5K
28K‡
1
No
20/25
100-pin TQFP
TMS320C542
5.0
10K
2K
1
Yes
25
144-pin TQFP
TMS320LC542
3.3
10K
2K
1
Yes
20/25
128-pin TQFP/144-pin TQFP
TMS320LC543
3.3
10K
2K
1
No
20/25
100-pin TQFP
TMS320LC545
3.3
6K
48K#
2||
1
Yes
20/25
128-pin TQFP
TMS320LC545A
h
3.3
6K
48K#
2||
1
Yes
15/20/25
128-pin TQFP
TMS320LC545B
h
3.3
6K
48K#
2||
1
Yes
15/20/25
128-pin TQFP
TMS320LC546
3.3
6K
48K#
2||
1
No
20/25
100-pin TQFP
TMS320LC546A
h
3.3
6K
48K#
2||
1
No
15/20/25
100-pin TQFP
TMS320LC546B
h
3.3
6K
48K#
2||
1
No
15/20/25
100-pin TQFP
TMS320LC548
h
3.3
32K
2K
3
k
1
Yes
12.5/15/20
144-pin TQFP/144-pin BGA
TMS320LC549
h
3.3
32K
16K
3
k
1
Yes
12.5/15
144-pin TQFP/144-pin BGA
TMS320VC549
h
3.3 (2.5 core)
32K
16K
3
k
1
Yes
8.3/10/12.5
144-pin TQFP/144-pin BGA
Legend:
TQFP = Thin Quad Flatpack
BGA = MicroStar BGA
™ (Ball Grid Array)
† The dual-access RAM (single access RAM on ’548 and ’549 devices) can be configured as data memory or program/data memory.
‡ For ’C541/’LC541, 8K words of ROM can be configured as program memory or program/data memory.
§ Two standard (general-purpose) serial ports
¶ One TDM and one BSP
# For ’LC545/’LC546, 16K words of ROM can be configured as program memory or program/data memory.
|| One standard and one BSP
kOne TDM and two BSPs
hRefer to separate data sheet for electrical specifications.
MicroStar BGA is a trademark of Texas Instruments Incorporated.


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