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TPIC6B259DW Datasheet(PDF) 1 Page - Texas Instruments |
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TPIC6B259DW Datasheet(HTML) 1 Page - Texas Instruments |
1 / 19 page TPIC6B259 POWER LOGIC 8-BIT ADDRESSABLE LATCH SLIS030 – APRIL 1994 – REVISED JULY 1995 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 D Low rDS(on) ...5 Ω Typical D Avalanche Energy ...30 mJ D Eight Power DMOS-Transistor Outputs of 150-mA Continuous Current D 500-mA Typical Current-Limiting Capability D Output Clamp Voltage . . . 50 V D Four Distinct Function Modes D Low Power Consumption description This power logic 8-bit addressable latch controls open-drain DMOS-transistor outputs and is designed for general-purpose storage applications in digital systems. Specific uses include working registers, serial-holding registers, and decoders or demultiplexers. This is a multi- functional device capable of storing single-line data in eight addressable latches and 3-to-8 decoder or demultiplexer with active-low DMOS outputs. Four distinct modes of operation are selectable by controlling the clear (CLR) and enable (G) inputs as enumerated in the function table. In the addressable-latch mode, data at the data-in (D) terminal is written into the addressed latch. The addressed DMOS-transistor output inverts the data input with all unaddressed DMOS-transistor outputs remaining in their previous states. In the memory mode, all DMOS-transistor outputs remain in their previous states and are unaffected by the data or address inputs. To eliminate the possibility of entering erroneous data in the latch, enable G should be held high (inactive) while the address lines are changing. In the 3-to-8 decoding or demultiplexing mode, the addressed output is inverted with respect to the D input and all other outputs are off. In the clear mode, all outputs are off and unaffected by the address and data inputs. When data is low for a given output, the DMOS-transistor output is off. When data is high, the DMOS-transistor output has sink-current capability. Outputs are low-side, open-drain DMOS transistors with output ratings of 50 V and 150-mA continuous sink-current capability. Each output provides a 500-mA typical current limit at TC = 25°C. The current limit decreases as the junction temperature increases for additional device protection. The TPIC6B259 is characterized for operation over the operating case temperature range of – 40 °C to 125°C. Copyright © 1997, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 NC VCC S0 DRAIN0 DRAIN1 DRAIN2 DRAIN3 S1 GND GND NC CLR D DRAIN7 DRAIN6 DRAIN5 DRAIN4 G S2 GND DW OR N PACKAGE (TOP VIEW) OUTPUT OF ADDRESSED DRAIN EACH OTHER DRAIN INPUTS FUNCTION CLR G FUNCTION TABLE LATCH SELECTION TABLE SELECT INPUTS DRAIN ADDRESSED 0 1 2 3 4 5 6 7 L L L L H H H H D H H L L H L L H Qio Qio Qio Qio H H X Memory L L L L H L L H H H 8-Line Demultiplexer L H X H H Clear Addressable Latch S2 S1 S0 L L H H L L H H L H L H L H L H NC – No internal connection H = high level, L = low level PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
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