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OPA561PWP Datasheet(PDF) 10 Page - Texas Instruments

Part # OPA561PWP
Description  High-Current, High-Speed OPERATIONAL AMPLIFIER
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

OPA561PWP Datasheet(HTML) 10 Page - Texas Instruments

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OPA561
SBOS206E − DECEMBER 2001 − REVISED FEBRUARY 2007
www.ti.com
10
THERMAL RESISTANCE vs
CIRCUIT BOARD COPPER AREA
45
40
35
30
25
20
0
123
45
Copper Area (inches2)
OPA561
Surface Mount Package
2oz copper
Figure 5. Thermal Resistance vs Circuit Board
Copper Area
AMPLIFIER MOUNTING
What is PowerPAD?
The OPA561 uses the HTSSOP-20 PowerPAD package,
a thermally enhanced, standard size IC package designed
to eliminate the use of bulky heatsinks and slugs
traditionally used in thermal packages. This package can
be easily mounted using standard PCB assembly tech-
niques, and can be removed and replaced using standard
repair procedures.
The PowerPAD package is designed so that the leadframe
die pad (or thermal pad) is exposed on the bottom of the
IC, as shown in Figure 6. This provides an extremely low
thermal resistance (
qJC ) path between the die and the
exterior of the package. The thermal pad on the bottom of
the IC must be soldered directly to the PCB, using the PCB
as a heatsink. In addition, through the use of thermal vias,
the thermal pad can be directly connected to a ground
plane or special heatsink structure designed into the PCB.
Mold Compound (Epoxy)
Leadframe Die Pad
Exposed atBaseofthe Package
Leadframe (Copper Alloy)
IC (Silicon)
Die Attach (Epoxy)
Figure 6. Section View of a PowerPAD Package
Soldering
the
PowerPAD
to
the
PCB
is
always
recommended, even with applications that have low power
dissipation. It provides the necessary connection between
the leadframe die and the PCB. The PowerPAD must be
connected to the most negative supply of the device.
PowerPAD Assembly Process
1.
Prepare the PCB with a top side etch pattern, as
shown in the attached Thermal Land Pattern
mechanical drawing. There should be etch for the
leads as well as etch for the thermal land.
2.
Place the recommended number of holes (or thermal
vias) in the area of the thermal pad as shown on the
attached Land Pattern mechanical. These holes
should be 13 mils in diameter. They are kept small so
that solder wicking through the holes is not a problem
during reflow.
3.
It is recommended, but not required, to place a small
number of the holes under the package and outside
the thermal pad area. These holes provide additional
heat path between the copper land and ground plane
and are 25 mils in diameter. They may be larger
because they are not in the area to be soldered, so
wicking is not a problem.
4.
Connect all holes, including those within the thermal
pad area and outside the pad area, to the internal
ground plane or other internal copper plane.
5.
When connecting these holes to the ground plane, do
not use the typical web or spoke via connection
methodology; see Figure 7. Web connections have a
high thermal resistance connection that is useful for
slowing the heat transfer during soldering operations.
This makes the soldering of vias that have plane
connections easier. However, in this application, low
thermal resistance is desired for the most efficient
heat transfer. Therefore, the holes under the
PowerPAD package should make their connection to
the internal ground plane with a complete connection
around the entire circumference of the plated through
hole.
Web or Spoke Via
Solid Via
NOT RECOMMENDED
RECOMMENDED
Figure 7. Via Connection
Not Recommended for New Designs


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