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OPA606KP Datasheet(PDF) 8 Page - Texas Instruments

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Part # OPA606KP
Description  OPERATIONAL AMPLIFIER
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

OPA606KP Datasheet(HTML) 8 Page - Texas Instruments

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8
®
OPA606
INPUT PROTECTION
Static damage can cause subtle changes in amplifier input
characteristics without necessarily destroying the device. In
precision operational amplifiers (both bipolar and FET types),
this may cause a noticeable degradation of offset voltage and
drift. Static protection is recommended when handling any
precision IC operational amplifier.
If the input voltage exceeds the amplifier’s negative supply
voltage, input current limiting must be used to prevent
damage.
CIRCUIT LAYOUT
Wideband amplifiers require good circuit layout techniques
and adequate power supply bypassing. Short, direct connec-
tions and good high frequency bypass capacitors (ceramic or
tantalum) will help avoid noise pickup or oscillation.
GUARDING AND SHIELDING
As in any situation where high impedances are involved,
careful shielding is required to reduce “hum” pickup in input
leads. If large feedback resistors are used, they should also
be shielded along with the external input circuitry.
Leakage currents across printed circuit boards can easily
exceed the bias current of the OPA606. To avoid leakage
problems, it is recommended that the signal input lead of the
OPA606 be wired to a Teflon® standoff. If the OPA606 is to
be soldered directly into a printed circuit board, utmost care
must be used in planning the board layout.
A “guard” pattern should completely surround the high
impedance input leads and should be connected to a low
impedance point which is at the signal input potential (see
Figure 3).
FIGURE 3. Connection of Input Guard.
APPLICATIONS CIRCUITS
FIGURE 4. Inverting Amplifier.
FIGURE 5. Noninverting Buffer.
FIGURE 2. Settling Time Test Circuit.
DUT
2
6
Scope
3
0.1%
0.1%
2k
7
4
2N4416
2N4416
100pF
3k
2k
2k
0.1%
5k
Summing
Node
V
OUT
G = –1
+15V
–15V
+15V
+5V
–5V
0.1%
5k
2
3
In
Noninverting
6
Out
2
3
In
Inverting
6
Out
2
3
In
Buffer
6
Out
OPA606
OPA606
OPA606
BOARD LAYOUT
FOR INPUT GUARDING
Guard top and bottom of board.
Alternate: use Teflon® standoff
for sensitive input pins.
Teflon® E. I. Du Pont
de Nemours & Co.
7
6
8
TO-99 Bottom View
3
2
4 5
6
7
8
1
Mini-DIP Bottom View
3
2
4
1
5
Output
+15VDC
10k
–15VDC
OPA606
BANDWIDTH > 1MHz
T
S ≈ 1.8µsec (0.01%)
GAIN = –10V/V
Input
4
1k
3
2
7
0.1µF
0.1µF
6
Output
+15VDC
–15VDC
OPA606
Input
0.1µF
0.1µF
4
7
2
3
Bandwidth > 12MHz
Gain = +1V/V
R
IN ≈ 10
13
6


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