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TPS3813I50-Q1 Datasheet(PDF) 11 Page - Texas Instruments

Part # TPS3813I50-Q1
Description  Processor Supervisory Circuits With Window-Watchdog
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
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TPS3813I50-Q1 Datasheet(HTML) 11 Page - Texas Instruments

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(ext)
window,typ
C
t
6.25 ms
15.55 pF
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TPS3813K33-Q1, TPS3813I50-Q1
www.ti.com
SPRS288D – MAY 2008 – REVISED JUNE 2015
Typical Application (continued)
8.2.1 Design Requirements
Design requirements include any design parameters that are solely based on the watchdog timing desired by the
user. The Implemented Window-Watchdog Settings and Detailed Design Procedure sections describe these
timings. Select the TPS3813-Q1 device option based on desired threshold voltage of either 2.5 V, 3 V, 3.3 V, or
5 V.
8.2.2 Detailed Design Procedure
To configure the window watchdog function, two pins are provided by the TPS3813-Q1 family of devices. These
pins set the window timeout and ratio.
The window watchdog ratio is a fixed ratio, which determines the lower boundary of the window frame. This ratio
can be configured in two different frame sizes.
If the window watchdog ratio pin (WDR) is set to VDD (Position 1 in Figure 8) then the lower window frame is a
value based on a ratio calculation of the overall window timeout size. For the watchdog timeout pin (WDT)
connected to GND, the value is a ratio of 1:124.9, for WDT connected to VDD, the value is a ratio of 1:127.7, and
for an external capacitor connected to WDT, the value is a ratio of 1:64.5.
If the window watchdog ratio pin (WDR) is set to GND (Position 2) the lower window frame is a value based on a
ratio calculation of the overall window timeout size. For the watchdog timeout pin (WDT) connected to GND, the
value is a ratio of 1:31.8, for WDT connected to VDD the value is a ratio 1:32, and for an external capacitor
connected to WDT the value is a ratio of 1:25.8.
The watchdog timeout can be set in two fixed timings of 0.25 s and 2.5 s for the window or can by programmed
by connecting a external capacitor with a low leakage current at WDT.
For example, if the watchdog timeout pin (WDT) is connected to VDD, the timeout is 2.5 s. If the window
watchdog ratio pin (WDR) is set in this configuration to a ratio of 1:127.7 by connecting the pin to VDD, the lower
boundary is 19.6 ms.
8.2.2.1 Programming Window-Watchdog Using an External Capacitor
The upper boundary of the watchdog timer can be set by an external capacitor connected between the WDT pin
and GND. Common consumer electronic capacitors can be used to implement this feature. The capacitors that
are used should have low ESR and low tolerances because the tolerances must be considered to perform the
calculations. The first formula is used to calculate the upper window frame. After calculating the upper window
frame, the lower boundary can be calculated. As in the last example, the most important values are the
tboundary,max and twindow,min. The trigger pulse must fit into this window frame.
The external capacitor should have a value between a minimum of 155 pF and a maximum of 63 nF.
(1)
Table 4. Watchdog Upper-Boundary Capacitor Programming
SELECTED OPERATION MODE
WINDOW FRAME
twindow,max = 1.25 × twindow,typ
WDT = external capacitor C(ext)
WDR = 0 V and WDR = VDD
twindow,min = 0.75 × twindow,typ
Copyright © 2008–2015, Texas Instruments Incorporated
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