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DEVICE INFORMATION

1

2

3

4

5

6

7

14

13

12

11

10

9

8

VID5

VID0

VID1

VID2

VID3

VID4

GND

VCC

NCPU2

NCPU1

N/C

BIAS

FB

VOUT

PW PACKAGE

(TOP VIEW)

8

1

2

3

14

9

10

12

VCC

FB

BIAS

VOUT

VID5

VID0

VID1

DC

Rx

4

5

6

7

VID2

VID3

VID4

GND

13

TPS40120

10 kΩ

NCPU1

NCPU2

TPS40120

SLUS616B–JULY 2004–REVISED AUGUST 2004

TERMINAL FUNCTIONS

TERMINAL

I/O

DESCRIPTION

NAME

NO.

BIAS

10

I

Provides controller’s reference voltage into the divider for improved tolerance.

Middle point of the feedback divider connected to the inverting input of the controller’s error

FB

9

O

amplifier

GND

7

-

Signal ground pin.

NCPU1

12

O

Signals no CPU state. VID = x11111. Open drain output.

NCPU2

13

O

Signals no CPU state. VID = x11111. TTL logic output.

VCC

14

I

Power to the device.

VID0

2

I

VID1

3

I

VID2

4

I

these pins.

VID3

5

I

VID4

6

I

VID5

1

I

This pin is connected to the output of the VR module or to the output of the differential amplifier

VOUT

8

I

of the TPS40090 controller.

FUNCTIONAL BLOCK DIAGRAM

3