6

TPS43330A-Q1

SLVSC16B – AUGUST 2013 – REVISED JULY 2016

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Copyright © 2013–2016, Texas Instruments Incorporated

(1)

Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating

Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage

values are with respect to AGND, unless otherwise specified.

6 Specifications

6.1 Absolute Maximum Ratings

(1)

MIN

MAX

UNIT

Voltage

Input voltage: VIN, VBAT

–0.3

60

V

Voltage

(buck function:

BuckA and BuckB)

Ground: PGNDA–AGND, PGNDB–AGND

–0.3

0.3

V

Enable inputs: ENA, ENB

–0.3

60

Bootstrap inputs: CBA, CBB

–0.3

68

Bootstrap inputs: CBA–PHA, CBB–PHB

–0.3

8.8

Phase inputs: PHA, PHB

–0.7

60

Phase inputs: PHA, PHB (for 150 ns)

–1

60

Feedback inputs: FBA, FBB

–0.3

13

Error-amplifier outputs: COMPA, COMPB

–0.3

13

High-side MOSFET drivers: GA1-PHA, GB1-PHB

–0.3

8.8

Low-side MOSFET drivers: GA2–PGNDA, GB2–PGNDB

–0.3

8.8

Current-sense voltage: SA1, SA2, SB1, SB2

–0.3

13

Soft start: SSA, SSB

–0.3

13

Power-good outputs: PGA, PGB

–0.3

13

Power-good delay: DLYAB

–0.3

13

Switching-frequency timing resistor: RT

–0.3

13

SYNC, EXTSUP

–0.3

13

Voltage

(boost function)

Low-side MOSFET driver: GC1–PGNDA

–0.3

8.8

V

Error-amplifier output: COMPC

–0.3

13

Enable input: ENC

–0.3

13

Current-limit sense: DS

–0.3

60

Output-voltage select: DIV

–0.3

8.8

Voltage

(PMOS driver)

P-channel MOSFET driver: GC2

–0.3

60

V

P-channel MOSFET driver: VIN-GC2

–0.3

8.8

Voltage (Gate-driver

supply)

Gate-driver supply: VREG

–0.3

8.8

V

Temperature

–40

150

°C

–40

125

–55

165

(1)

AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

6.2 ESD Ratings

VALUE

UNIT

Electrostatic

discharge

±2000

V

Charged-device model (CDM), per AEC Q100-011

All pins except 1, 19, 20,

and 38

±500

Pins 1, 19, 20, and 38

±750

Machine model

All pins except 15 and 24

±200

Pins 15 and 24

±150