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TPS53632 Datasheet(PDF) 7 Page - Texas Instruments |
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TPS53632 Datasheet(HTML) 7 Page - Texas Instruments |
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7 / 43 page  TPS53632 www.ti.com SLUSBW8 – SEPTEMBER 2014 Electrical Characteristics (continued) over recommended free-air temperature range, 4.5 V ≤ VV5A ≤ 5.5 V, 3.0 V ≤ VVDD ≤ 3.6 V, VGFB = GND, VVFB = VCORE (unless otherwise noted). PARAMETER CONDITIONS MIN TYP MAX UNIT CURRENT SENSE: OVER CURRENT PROTECTION, PHASE ADD AND DROP, AND PHASE BALANCE ROCP-I = 20 kΩ 3.7 7.6 11.4 ROCP-I = 24 kΩ 6.6 10.5 14.1 ROCP-I = 30 kΩ 10.6 14.5 18.0 ROCP-I = 39 kΩ 15.4 19.5 23.0 OCP voltage (valley current VOCPP mV limit) ROCP-I = 56 kΩ 21.3 25.4 29.0 ROCP-I = 75 kΩ 28.4 32.5 36.2 ROCP-I = 100 kΩ 36.3 40.5 44.0 ROCP-I = 150 kΩ 45.0 49.3 53.0 Valley current, % of OCP value, mode changes from 2-phase IAD23 Phase add 25% CCM to 3-phase CCM Valley current, % of OCP value, mode changes from 1-phase IAD12 Phase add 10% DCM to 2-phase CCM Valley current, % of OCP value, mode changes from 3-phase IAD32 Phase drop 15% CCM to 2-phase CCM Valley current, % of OCP value, mode changes from 2-phase IAD21 Phase drop 7% CCM to 1-phase DCM ICS CS pin input bias current CSPx and CSNx –500 0.2 500 nA Error amplifier total voltage AV-EA VFB to DROOP 80 dB gain(1) IEA_SR Error amplifier source current IDROOP, VVFB = VDAC + 50 mV, RCOMP = 1 kΩ 1 mA IEA_SK Error amplifier sink current IDROOP, VVFB = VDAC – 50mV, RCOMP = 1 kΩ –1 ACSINT Internal current sense gain Gain from CSPx – CSNx to PWM comparator, RSKIP = Open 5.8 6.0 6.2 V/V RSFTSTP Soft-stop transistor resistance Connected to CSN1 100 200 Ω Voltage to disable dynamic VDP_OFF Voltage at FREQ-P at start-up 0.70 phase add/drop V Voltage to enable dynamic VDP_ON Voltage at FREQ-P at start-up 0.40 phase add/drop Hysteresis voltage of phase VDP_HYS Voltage at FREQ-P at start-up 80 mV add/drop circuit EN = HI 350 600 k Ω RVIN VIN resistance EN = LOW or STBY 10 M Ω PROTECTION: OVP, UVP, PGOOD AND THERMAL SHUTDOWN VOVPH Fixed OVP voltage VCSN1 > VOVPH for 1 µs 1.60 1.70 1.80 V VPGDH PGOOD high threshold Measured at the VFB pin w/r/t VID code, device latches OFF 190 245 mV VPGDL PGOOD low threshold Measured at the VFB pin w/r/t VID code, device latches OFF -348 -280 PWM AND SKIP OUTPUTS: I/O VOLTAGE AND CURRENT VP-S_L PWMx/SKIP - Low PWMILOAD = ± 1 mA, SKIPILOAD = ± 100 µA 0.15 0.3 VP-S_H PWMx/SKIP - High PWMILOAD = ± 1 mA, SKIPILOAD = ± 100 µA 4.2 V VPW-SKLK PWMx tri-state PWMILOAD = ± 100 µA 1.6 1.7 1.8 LOGIC INTERFACE: VOLTAGE AND CURRENT RVRTTL VSDA = 0.31 4 15 Pull-down resistance Ω RVRPG VPGOOD= 0.31 36 50 IVRTTLK Logic leakage current VSCL= 1.8 V, VSDA = 1.8 V, VPGOOD = 3.3 V -2 0.2 2 µA VIL Low-level Input voltage 0.6 SCL, SDA; VVINTF = 1.8 V V VIH High-level Input voltage 1.2 IENH I/O leakage, EN Leakage current , VEN = 1.8 V 24 40 µA (1) Specified by design. Not propduction tested. Copyright © 2014, Texas Instruments Incorporated Submit Documentation Feedback 7 Product Folder Links: TPS53632 |
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