TPS54010MPWPEP datasheet(4/31 Pages) TI1

Part #	TPS54010MPWPEP

Description	2.2-V to 4-V, 14-A OUTPUT SYNCHRONOUS BUCK PWM SWITCHER WITH INTEGRATED FETs

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Manufacturer	TI1 [Texas Instruments]

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TPS54010-EP

SLVSBN3 – JANUARY 2013

www.ti.com

THERMAL INFORMATION

TPS54010

THERMAL METRIC(1)

PWP

UNITS

28 PINS

θJA

Junction-to-ambient thermal resistance(2)

30.5

θJCtop

Junction-to-case (top) thermal resistance(3)

13.5

θJB

Junction-to-board thermal resistance(4)

11.6

°C/W

ψJT

Junction-to-top characterization parameter(5)

0.4

ψJB

Junction-to-board characterization parameter(6)

11.4

θJCbot

Junction-to-case (bottom) thermal resistance(7)

0.9

(1)

For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

(2)

The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as

specified in JESD51-7, in an environment described in JESD51-2a.

(3)

The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific JEDEC-

standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.

(4)

The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB

temperature, as described in JESD51-8.

(5)

The junction-to-top characterization parameter,

ψJT, estimates the junction temperature of a device in a real system and is extracted

from the simulation data for obtaining

θJA, using a procedure described in JESD51-2a (sections 6 and 7).

(6)

The junction-to-board characterization parameter,

ψJB, estimates the junction temperature of a device in a real system and is extracted

from the simulation data for obtaining

θJA , using a procedure described in JESD51-2a (sections 6 and 7).

(7)

The junction-to-case (bottom) thermal resistance is obtained by simulating a cold plate test on the exposed (power) pad. No specific

JEDEC standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.

Spacer

ELECTRICAL CHARACTERISTICS

TJ = -55°C to 125°C, VIN = 3 V to 4 V, PVIN = 2.2 V to 4 V (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

SUPPLY VOLTAGE, VIN

VI

Input voltage, VIN

3

4

V

Supply voltage range, PVIN

Output = 1.8 V

2.2

4

V

fs = 350 kHz, RT open, PH pin open, PVIN = 2.5 V,

6.3

10

mA

SYNC = 0 V

VIN

fs = 550 kHz, RT open, PH pin open, SYNC ≥ 2.5 V,

8.3

13

mA

PVIN = 2.5 V

SHUTDOWN, SS/ENA = 0 V, PVIN = 2.5 V

1

1.4

mA

IQ

Quiescent current

fs = 350 kHz, RT open, PH pin open, PVIN = 3.3 V,

6

8

mA

SYNC = 0 V

PVIN

fs = 550 kHz, RT open, PH pin open, SYNC ≥ 2.5 V,

6

10

mA

PVIN = 2.5 V, VIN = 3.3 V

SHUTDOWN, SS/ENA = 0 V, VIN = 3.3 V

<140

µA

UNDERVOLTAGE LOCKOUT (VIN)

Start threshold voltage, UVLO

2.95

3

V

Stop threshold voltage, UVLO

2.7

2.8

V

Hysteresis voltage, UVLO

0.11

V

Rising and falling edge deglitch, UVLO(1)

2.5

µs

BIAS VOLTAGE

Output voltage, VBIAS

I(VBIAS) = 0

2.7

2.8

2.95

V

Output current, VBIAS(2)

100

µA

CUMULATIVE REFERENCE

Vref

Accuracy

0.879

0.891

0.903

V

(1)

Specified by design from -40°C to 125°C

(2)

Static resistive loads only

4

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