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OPA842IDBVRG4 Datasheet(PDF) 3 Page - Texas Instruments |
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OPA842IDBVRG4 Datasheet(HTML) 3 Page - Texas Instruments |
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3 / 29 page  OPA842 www.ti.com SBOS267D – NOVEMBER 2002 – REVISED SEPTEMBER 2010 ELECTRICAL CHARACTERISTICS: VS = ±5V Boldface limits are tested at +25°C. At TA = +25°C, VS = ±5V, RF = 402Ω, RL = 100Ω, and G = +2, unless otherwise noted. See Figure 37 for ac performance. OPA842ID, IDBV MIN/MAX OVER TYP TEMPERATURE 0°C to -40°C to MIN/ TEST PARAMETER TEST CONDITIONS +25°C +25°C(2) +70°C(3) +85°C(3) UNIT MAX LEVELS(1) AC Performance (see Figure 37) Closed-Loop Bandwidth (VO = G = +1, RF = 25Ω 350 MHz typ C 100mVPP) G = +2 150 105 101 100 MHz min B G = +5 45 30 29 29 MHz min B G = +10 21 15 14 14 MHz min B Gain-Bandwidth Product 200 136 135 135 MHz min B Bandwidth for 0.1dB Gain Flatness G = +2, RL = 100Ω, VO = 100mVPP 56 MHz typ C G = +1, RL = 100Ω, RF = 25Ω 105 MHz typ C Harmonic Distortion G = +2, f = 5MHz, VO = 2VPP xx x second-Harmonic RL = 100Ω –80 –78 –77 –76 dBc max B RL = 500Ω –94 –92 –91 –90 dBc max B xx x third-Harmonic RL = 100Ω –97 –96 –95 –94 dBc max B RL = 500Ω –93 –91 –90 –90 dBc max B Two-Tone, Third-Order Intercept G = +2, f = 10MHz 44 dBm typ C Input Voltage Noise f > 1MHz 2.6 2.8 3.0 3.1 nV/ √Hz max B Input Current Noise f > 1MHz 2.7 2.8 2.9 3.0 pA/ √Hz max B Rise and Fall Time 0.2V Step 2.3 3.3 3.4 3.5 ns max B Slew Rate 2V Step 400 300 250 225 V/ms min B Settling Time to 0.01% 2V Step 22 ns typ C Settling Time to 0.1% 2V Step 15 19.6 20.3 21.3 ns max B Settling Time to 1.0% 2V Step 9 10.2 11.3 12.5 ns max B Differential Gain G = +2, NTSC, RL = 150Ω 0.003 % typ C Differential Phase G = +2, NTSC, RL = 150Ω 0.008 degrees typ C DC PERFORMANCE(4) Open-Loop Voltage Gain (AOL) VO = 0V 110 100 96 92 dB min A Input Offset Voltage VCM = 0V ±0.30 ±1.2 ±1.4 ±1.5 mV max A Average Offset Voltage Drift VCM = 0V ±4 ±4 mV/°C max B Input Bias Current VCM = 0V –20 –35 –36 –37 mA max A Input Bias Current Drift VCM = 0V 25 25 nA/°C max B Input Offset Current VCM = 0V ±0.35 ±1.0 ±1.15 ±1.17 mA max A Input Offset Current Drift VCM = 0V ±2 ±2 nA/°C max B INPUT Common-Mode Input Range(5) ±3.2 ±3.0 ±2.9 ±2.8 V min A (CMIR) Common-Mode Rejection Ratio VCM = ±1V, Input-Referred 95 85 84 82 dB min A (CMRR) Input Impedance xx x Differential Mode VCM = 0V 14 || 1 k Ω || pF typ C xx x Common-Mode VCM = 0V 3.1 || 1.2 M Ω || pF typ C (1) Test levels: (A) 100% tested at +25°C. Over temperature limits by characterization and simulation. (B) Limits set by characterization and simulation. (C) Typical value only for information. (2) Junction temperature = ambient temperature for +25°C specifications. (3) Junction temperature = ambient at low temperature limits; junction temperature = ambient +23°C at high temperature limit for over- temperature min/max specifications. (4) Current is considered positive out-of-node. VCM is the input common-mode voltage. (5) Tested < 3dB below minimum specified CMRR at ±CMIR limits. Copyright © 2002–2010, Texas Instruments Incorporated 3 Product Folder Link(s): OPA842 |
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