Tss(ms)=

C6(nF) Vref

•

Iss( A)

µ

−

=

2

−

I

=

OUT(LL)

1

-

(V

- V

) V

IN

OUT

OUT

·

V

IN

-

·

TPS54326

www.ti.com

SLVSA13E – OCTOBER 2009 – REVISED JUNE 2012

At the beginning of each cycle, the high-side MOSFET is turned on. This MOSFET is turned off after internal one

maintain a pseudo-fixed frequency over the input voltage range, hence it is called adaptive on-time control. The

one-shot timer is reset and the high-side MOSFET is turned on again when the feedback voltage falls below the

reference voltage. An internal ramp is added to the reference voltage to simulate output ripple, eliminating the

need for ESR induced output ripple from D-CAP2™ mode control.

PWM Frequency and Adaptive On-Time Control

TPS54326 uses an adaptive on-time control scheme and does not have a dedicated on board oscillator. The

TPS54326 runs with a pseudo-constant frequency of 700 kHz by using the input voltage and output voltage to

set the on-time one-shot timer. The on-time is inversely proportional to the input voltage and proportional to the

output voltage. The actual frequency may vary from 700 kHz depending on the off time, which is ended when the

Auto-Skip Eco-Mode™ Control

The TPS54326 is designed with Auto-Skip Eco-Mode™ to increase light load efficiency. As the output current

decreases from heavy load condition, the inductor current is also reduced and eventually comes to point that its

rippled valley touches zero level, which is the boundary between continuous conduction and discontinuous

conduction modes. The rectifying MOSFET is turned off when its zero inductor current is detected. As the load

current further decreases the converter run into discontinuous conduction mode. The on-time is kept almost the

same as is was in the continuous conduction mode so that it takes longer time to discharge the output capacitor

with smaller load current to the level of the reference voltage. The transition point to the light load operation

(1)

Soft Start and Pre-Biased Soft Start

The soft start function is adjustable. When the EN pin becomes high, 2-

μA current begins charging the capacitor

which is connected from the SS pin to GND. Smooth control of the output voltage is maintained during start up.

The equation for the slow start time is shown in Equation 2. VFB voltage is 0.765 V and SS pin source current is

2

μA.

(2)

A unique circuit to prevent current from being pulled from the output during startup if the output is pre-biased.

When the soft-start commands a voltage higher than the pre-bias level (internal soft start becomes greater than

gate driver pulses with a narrow on-time. It then increments that on-time on a cycle-by-cycle basis until it

coincides with the time dictated by (1-D), where D is the duty cycle of the converter. This scheme prevents the

initial sinking of the pre-bias output, and ensure that the out voltage (VO) starts and ramps up smoothly into

regulation and the control loop is given time to transition from pre-biased start-up to normal mode operation.

Power Good

The power good function is activated after soft start has finished. The power good function becomes active after

1.7 times soft-start time. When the output voltage is within –10% of the target value, internal comparators detect

power good state and the power good signal becomes high. Rpg resister value, which is connected between PG

and VREG5, is required from 20k

Ω to 150kΩ. If the feedback voltage goes under 15% of the target value, the

power good signal becomes low after a 10 ms internal delay.

Output Discharge Control

TPS54326 discharges the output when EN is low, or the controller is turned off by the protection functions (OVP,

UVP, UVLO and thermal shutdown). The output is discharged by an internal 50-

Ω MOSFET which is connected

from VO to PGND. The internal low-side MOSFET is not turned on during the output discharge operation to

avoid the possibility of causing negative voltage at the output.

Copyright © 2009–2012, Texas Instruments Incorporated

7

Product Folder Link(s) :TPS54326