TPS56100

HIGHEFFICIENCY DSP POWER SUPPLY CONTROLLER

FOR 5V INPUT SYSTEMS

SLVS201A − JUNE 1999 − REVISED JULY 1999

6

POST OFFICE BOX 655303

detailed description (continued)

inhibit

INHIBIT is a TTL-compatible digital input used to enable the controller. When INHIBIT is low, the output drivers

are low and the slowstart capacitor is discharged. When INHIBIT goes high, the short across the slowstart

capacitor is released and normal converter operation begins. The 5-V supply must be above UVLO thresholds

before the controller is allowed to start up. The inhibit start threshold is 2.1 V and the hysteresis is 100 mV for

the INHIBIT comparator.

during power up. When the controller is disabled, the output drivers will be low and the slowstart capacitor is

normal converter operation begins. There is a 0.5-V hysteresis in the undervoltage lockout circuit for noise

immunity.

slowstart

ANAGND and is charged by an internal current source. The current source is proportional to the reference

the same value for all VP settings. The slowstart charging current is determined by the following equation:

setting the slowstart time is:

(seconds)

power good

pin is pulled low. PWRGD is an open-drain output.

overvoltage protection

undervoltage lockout value or INHIBIT is low. A 3-

µs deglitch timer is included for noise immunity. Refer to the

LODRV section for information on how to protect the microprocessor against overvoltages due to a shorted

high-side power FET.