TPS60101

REGULATED 3.3V 100mA LOW NOISE

CHARGE PUMP DC/DC CONVERTER

SLVS214B − JUNE 1999 − REVISED AUGUST 2008

2

POST OFFICE BOX 655303

1

2

3

4

5

6

7

8

9

10

20

19

18

17

16

15

14

13

12

11

GND

SYNC

ENABLE

FB

OUT

C1+

IN

C1−

PGND

PGND

GND

3V8

COM

SKIP

OUT

C2+

IN

C2−

PGND

PGND

PWP PACKAGE

(TOP VIEW)

Figure 2. Bottom View of PWP Package,

Showing the Thermal Pad

Thermal

Pad

AVAILABLE OPTIONS

PACKAGE

TSSOP†

(PWP)

TPS60101PWP

† This package is available taped and reeled. To order this packaging

option, add an R suffix to the part number (e.g., TPS60101PWPR).

Terminal Functions

TERMINAL

I/O

DESCRIPTION

NAME

NO.

I/O

DESCRIPTION

3V8

19

I

Mode selection. When 3V8 is logic low the charge pump operates in the regulated 3.3-V mode. When 3V8 is

connected to IN the regulator operates in preregulated 3.8-V mode.

C1+

6

Positive terminal of the charge-pump capacitor C1F

C1−

8

Negative terminal of the charge-pump capacitor C1F

C2+

15

Positive terminal of the charge-pump capacitor C2F

C2−

13

Negative terminal of the charge-pump capacitor C2F

COM

18

I

Mode selection.

When COM is logic low the charge pump operates in push-pull mode to minimize output ripple. When COM is

connected to IN the regulator operates in single-ended mode requiring only one flying capacitor.

ENABLE

3

I

ENABLE Input. The device turns off, the output disconnects from the input, and the supply current decreases to

0.05

µA when ENABLE is a logic low. ENABLE High may only be applied when VIN is inside the recommended

operating range.

FB

4

I

FEEDBACK input. Connect FB to OUT as close to the load as possible to achieve best regulation. Resistive divider

is on chip to match internal reference voltage of 1.22 V.

GND

1, 20

GROUND. Analog ground for internal reference and control circuitry. Connect to PGND through a short trace.

IN

7, 14

I

Supply Input. Connect to an input supply in the 1.8-V to 3.6-V range. Bypass IN to GND with a (CO/2) µF capacitor.

Connect both INs through a short trace.

OUT

5, 16

O

Regulated power output. Connect both OUTs through a short trace and bypass OUT to GND with the output filter

capacitor CO. VO = 3.3 V when 3V8 = low and VO = 3.8 V when 3V8 = high.

PGND

9−12

PGND power ground. Charge-pump current flows through this pin. Connect all PGNDs together.

SKIP

17

I

Mode selection. When SKIP is logic low, the charge pump operates in constant-frequency mode. Output ripple

and noise are minimized in this mode. When SKIP is connect to IN, the device operates in pulse skip mode.

Quiescent current is lowest in this mode.

SYNC

2

I

Selection for external clock signal. Connect to GND to use the internally generated clock signal. Connect to IN

for external synchronization. In this case, the clock signal needs to be fed through 3V8 and the device operates

in the regulated 3.3-V mode.