Electronic Components Datasheet Search |
|
SN65HVD71DGKR Datasheet(PDF) 8 Page - Texas Instruments |
|
|
SN65HVD71DGKR Datasheet(HTML) 8 Page - Texas Instruments |
8 / 41 page SN65HVD70, SN65HVD71, SN65HVD73, SN65HVD74, SN65HVD76, SN65HVD77 SLLSEI9E – MAY 2014 – REVISED OCTOBER 2014 www.ti.com Electrical Characteristics (continued) over recommended operating range (unless otherwise specified) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VOH Receiver high-level output voltage IOH = –8 mA 2.4 VCC–0.3 V VOL Receiver low-level output voltage IOL = 8 mA 0.2 0.4 V Driver input, driver enable, and receiver enable input II –3 3 µA current Receiver output high-impedance HVD70, HVD73, IOZ VO = 0 V or VCC, RE = VCC –1 1 µA current HVD76 IOS Driver short-circuit output current –150 150 mA VI = 12 V 75 125 HVD70, HVD73 VI = –7 V –100 –40 VCC = 0 to ROC (max), II Bus input current (disabled driver) µA DE = GND VI = 12 V 240 333 HVD76 VI = –7 V –267 –180 Driver and receiver DE = VCC, RE = GND, 750 1100 µA enabled No load Driver enabled, receiver DE = VCC, RE = VCC, 350 650 µA disabled No load ICC Supply current (quiescent) Driver disabled, receiver DE = GND, RE = GND, 650 800 µA enabled No load Driver and receiver DE = GND, D = open, 0.1 5 µA disabled RE = VCC, No load Supply current (dynamic) See the Typical Characteristics section Tsd Thermal Shut-down junction temperature 170 °C 7.8 Switching Characteristics — 400 kbps 400-kbps devices (SN65HVD70, SN65HVD71) bit time ≥ 2 µs (over recommended operating conditions) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT DRIVER tr, tf Driver differential output rise/fall time 100 400 750 ns tPHL, tPLH Driver propagation delay RL = 54 Ω, CL = 50 pF See Figure 17 350 550 ns tSK(P) Driver pulse skew, |tPHL – tPLH| 40 ns tPHZ, tPLZ Driver disable time 50 200 ns See Figure 18 HVD70 Receiver enabled 300 750 ns and Figure 19 tPZH, tPZL Driver enable time Receiver disabled 3 8 µs RECEIVER tr, tf Receiver output rise/fall time 13 25 ns tPHL, tPLH Receiver propagation delay time CL = 15 pF See Figure 20 70 110 ns tSK(P) Receiver pulse skew, |tPHL – tPLH| 7 ns tPLZ, tPHZ Receiver disable time 45 60 ns tPZL(1), Driver enabled See Figure 21 20 115 ns HVD70 tPZH(1) 3 8 µs Receiver enable time tPZL(2), Driver disabled See Figure 22 tPZH(2) 8 Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated Product Folder Links: SN65HVD70 SN65HVD71 SN65HVD73 SN65HVD74 SN65HVD76 SN65HVD77 |
Similar Part No. - SN65HVD71DGKR |
|
Similar Description - SN65HVD71DGKR |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.NET |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |