PFMModeatLightLoad

PFMRipple

PWMModeatHeavyLoad

NominalDCOutputVoltage

10

TPS62660, TPS62665

SLVS871D – FEBRUARY 2010 – REVISED JUNE 2016

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Feature Description (continued)

8.3.5 Output Capacitor Discharge

The TPS6266x device can actively discharge the output capacitor when it turns off. The integrated discharge

resistor has a typical resistance of 15 Ω. The required time to discharge the output capacitor at the output node

depends on load current and the output capacitance value.

8.3.6 Undervoltage Lockout

The undervoltage lockout circuit prevents the device from misoperation at low input voltages. It prevents the

converter from turning on the switch or rectifier MOSFET under undefined conditions. The TPS6266x device

have a UVLO threshold set to 2.05 V (typical). Fully functional operation is permitted down to 2.1-V input voltage.

8.3.7 Short-Circuit Protection

The TPS6266x integrates a P-channel MOSFET current limit to protect the device against heavy load or short

circuits. When the current in the P-channel MOSFET reaches its current limit, the P-channel MOSFET is turned

off and the N-channel MOSFET is turned on. The regulator continues to limit the current on a cycle-by-cycle

basis.

As soon as the output voltage falls below approximately 0.4 V, the converter current limit is reduced to half of the

nominal value. Because the short-circuit protection is enabled during start-up, the device does not deliver more

than half of its nominal current limit until the output voltage exceeds approximately 0.5 V. Consider this when a

load acting as a current sink is connected to the output of the converter.

8.3.8 Thermal Shutdown

mode, the P- and N-channel MOSFETs are turned off. The device continues its operation when the junction

temperature again falls below typically 130°C.

8.4 Device Functional Modes

8.4.1 Power-Save Mode

If the load current decreases, the converter enters power-save mode operation automatically. During power-save

mode, the converter operates in discontinuous current (DCM) single-pulse PFM mode, which produces low

output ripple compared with other PFM architectures.

When in power-save mode, the converter resumes its operation when the output voltage trips below the nominal

voltage. It ramps up the output voltage with a minimum of one pulse and goes into power-save mode when the

inductor current has returned to a zero steady-state. The PFM ON-time varies inversely proportional to the input

voltage and proportional to the output voltage giving the regulated switching frequency when in steady-state.

PFM mode is left and PWM operation is entered as the output current can no longer be supported in PFM mode.

As a consequence, the DC output voltage is typically positioned approximately 0.5% above the nominal output

voltage and the transition between PFM and PWM is seamless.

Figure 8. Operation in PFM Mode and Transfer to PWM Mode