(

)

L

on

DS

R

R

IOUT

VOUT

VIN

+

+

=

)

(

(min)

÷

ø

ö

ç

è

æ

+

-

´

´

=

D

VOUT

VOUT

VIN

C

VIN

L

V

1

1

200

2

(

)

T O N

L

V O U T

V I N

´

-

=

)

(

[ ]

ns

VOUT

VIN

VIN

TON

-

´

= 100

[ ]

ns

VIN

VOUT

TON

400

´

=

10

TPS62135, TPS621351

SLVSBH3A – JUNE 2016 – REVISED SEPTEMBER 2016

www.ti.com

Product Folder Links: TPS62135 TPS621351

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Copyright © 2016, Texas Instruments Incorporated

9.4 Device Functional Modes

9.4.1 Pulse Width Modulation (PWM) Operation

TPS62135x has two operating modes: Forced PWM mode discussed in this section and PWM/PFM as discussed

in Power Save Mode Operation (PWM/PFM).

With the MODE pin set to high, the TPS62135x operates with pulse width modulation in continuous conduction

mode (CCM) with a nominal switching frequency of 2.5 MHz. The frequency variation in PWM is controlled and

depends on VIN, VOUT and the inductance. The on-time in forced PWM mode is given by:

(1)

9.4.2 Power Save Mode Operation (PWM/PFM)

When the MODE pin is low, Power Save Mode is allowed. The device operates in PWM mode as long the output

current is higher than half the inductor's ripple current. To maintain high efficiency at light loads, the device

enters Power Save Mode at the boundary to discontinuous conduction mode (DCM). This happens if the output

current becomes smaller than half the inductor's ripple current. For improved transient response, PWM mode is

forced for 8 switching cycles if the output voltage is above target due to a load release. The Power Save Mode is

entered seamlessly, if the load current decreases and the MODE pin is set low. This ensures a high efficiency in

light load operation. The device remains in Power Save Mode as long as the inductor current is discontinuous.

In Power Save Mode the switching frequency decreases linearly with the load current maintaining high efficiency.

The transition into and out of Power Save Mode is seamless in both directions.

The AEE function in TPS62135 and TPS621351 adjust the on-time (TON) in power save mode depending on the

input voltage and the output voltage to maintain highest efficiency. The on-time, in steady-state operation, can be

estimated as:

(2)

For very small output voltages, an absolute minimum on-time of about 50 ns is kept to limit switching losses. The

operating frequency is thereby reduced from its nominal value, which keeps efficiency high. Using TON, the

typical peak inductor current in Power Save Mode is approximated by:

(3)

above VOUT, the TPS62135x does not enter Power Save Mode, regardless of the load current. The device

maintains output regulation in PWM mode.

The output voltage ripple in power save mode is given by Equation 4:

(4)

9.4.3 100% Duty-Cycle Operation

The duty cycle of the buck converter is given by D = VOUT/VIN and increases as the input voltage comes close

to the output voltage. The minimum off-time is about 80 ns. When the minimum off-time is reached, TPS62135x

scales down its switching frequency while it approaches 100% mode. In 100% mode it keeps the high-side

switch on continuously. The high-side switch stays turned on as long as the output voltage is below the internal

set point. This allows the conversion of small input to output voltage differences, for example for longest

operation time of battery-powered applications. In 100% duty cycle mode, the low-side FET is switched off.

The minimum input voltage to maintain output voltage regulation, depending on the load current and the output

voltage level, can be calculated as:

spacing

(5)