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MB90560 Datasheet(PDF) 7 Page - Fujitsu Component Limited. |
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MB90560 Datasheet(HTML) 7 Page - Fujitsu Component Limited. |
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7 / 581 page  MB90560 series v 7.3 Mode Data ..........................................................................................................................................170 CHAPTER 8 I/O PORTS ..................................................................................................173 8.1 Overview of I/O Ports ..........................................................................................................................174 8.2 Port Register .......................................................................................................................................175 8.3 Port 0 .................................................................................................................................................176 8.3.1 Port 0 Registers (PDR0, DDR0, and RDR0) .................................................................................178 8.3.2 Operation of Port 0 ........................................................................................................................180 8.4 Port 1 ..................................................................................................................................................182 8.4.1 Port 1 Registers (PDR1, DDR1, and RDR1) .................................................................................184 8.4.2 Operation of Port 1 ........................................................................................................................186 8.5 Port 2 ..................................................................................................................................................188 8.5.1 Port 2 Registers (PDR2 and DDR2) ..............................................................................................190 8.5.2 Operation of Port 2 ........................................................................................................................192 8.6 Port 3 ..................................................................................................................................................194 8.6.1 Port 3 Registers (PDR3 and DDR3) ..............................................................................................196 8.6.2 Operation of Port 3 ........................................................................................................................198 8.7 Port 4 ..................................................................................................................................................200 8.7.1 Port 4 Registers (PDR4 and DDR4) ..............................................................................................202 8.7.2 Operation of Port 4 ........................................................................................................................204 8.8 Port 5 ..................................................................................................................................................206 8.8.1 Port 5 Registers (PDR5, DDR5, and ADER) .................................................................................208 8.8.2 Operation of Port 5 ........................................................................................................................210 8.9 Port 6 ..................................................................................................................................................212 8.9.1 Port 6 Registers (PDR6 and DDR6) ..............................................................................................214 8.9.2 Operation of Port 6 ........................................................................................................................216 8.10 Sample I/O Port Program ...................................................................................................................218 CHAPTER 9 TIMEBASE TIMER ....................................................................................221 9.1 Overview of the Timebase Timer ........................................................................................................222 9.2 Configuration of the Timebase Timer .................................................................................................224 9.3 Timebase Timer Control Register (TBTC) ..........................................................................................226 9.4 Timebase Timer Interrupts ..................................................................................................................228 9.5 Operation of the Timebase Timer .......................................................................................................230 9.6 Usage Notes on the Timebase Timer .................................................................................................232 9.7 Sample Program for the Timebase Timer Program ............................................................................234 CHAPTER 10 WATCHDOG TIMER ..................................................................................237 10.1 Overview of the Watchdog Timer .......................................................................................................238 10.2 Configuration of the Watchdog Timer .................................................................................................239 10.3 Watchdog Timer Control Register (WDTC) ........................................................................................240 10.4 Operation of the Watchdog Timer .......................................................................................................242 10.5 Usage Notes on the Watchdog Timer .................................................................................................244 10.6 Sample Program for the Watchdog Timer ..........................................................................................245 CHAPTER 11 16-BIT RELOAD TIMER ............................................................................247 11.1 Overview of the 16-Bit Reload Timer ..................................................................................................248 |
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