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NCP1251ASN65T1G Datasheet(PDF) 6 Page - ON Semiconductor

Part # NCP1251ASN65T1G
Description  Current-Mode PWM Controller for Off-line Power Supplies
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Manufacturer  ONSEMI [ON Semiconductor]
Direct Link  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

NCP1251ASN65T1G Datasheet(HTML) 6 Page - ON Semiconductor

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ELECTRICAL CHARACTERISTICS
(For typical values TJ = 25°C, for min/max values TJ = −40°C to +125°C, Max TJ = 150°C, VCC = 12 V unless otherwise noted)
Symbol
Unit
Max
Typ
Min
Pin
Rating
INTERNAL OSCILLATOR
fOSC
Oscillation frequency (65 kHz version)
61
65
71
kHz
fOSC
Oscillation frequency (100 kHz version)
92
100
108
kHz
Dmax
Maximum duty−cycle
76
80
84
%
fjitter
Frequency jittering in percentage of fOSC
±5
%
fswing
Swing frequency
240
Hz
FEEDBACK SECTION
Rup
Internal pull−up resistor
2
20
k
W
Req
Equivalent ac resistor from FB to GND
2
16
k
W
Iratio
Pin 2 to current setpoint division ratio
4.2
Vfreeze
Feedback voltage below which the peak current is frozen
2
1.05
V
FREQUENCY FOLDBACK
Vfold
Frequency foldback level on the feedback pin –
[45% of maximum peak current
1.5
V
VfoldF
Frequency foldback level on the feedback pin –
[59% of maximum peak current
(F version only)
1.9
V
Ftrans
Transition frequency below which skip−cycle occurs
22
26
30
kHz
Vfold,end
End of frequency foldback feedback level, Fsw = Fmin
350
mV
VfoldF,end
End of frequency foldback feedback level, Fsw = Fmin
(F version only)
1.5
V
Vskip
Skip−cycle level voltage on the feedback pin
300
mV
Skip
hysteresis
Hysteresis on the skip comparator – (Note 5)
30
mV
INTERNAL SLOPE COMPENSATION
Vramp
Internal ramp level @ 25
°C – (Note 7)
4
2.5
V
Rramp
Internal ramp resistance to CS pin
4
20
k
W
PROTECTIONS
Vlatch
Latching level input
3
2.7
3
3.3
V
Tlatch−blank
Blanking time after drive turn off
1
1.0
ms
Tlatch−count
Number of clock cycles before latch confirmation
4.0
Tlatch−del
OVP detection time constant
1
600
ns
Timer
Internal auto−recovery fault timer duration
100
130
160
ms
VOVP
Latched Over voltage protection on the VCC rail
5
24
25.5
27
V
TOVPdel
Delay before OVP on VCC confirmation
5
20
ms
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. For design robustness, we recommend to inject 60
mA as a minimum at the lowest input line voltage.
5. Guaranteed by design
6. See characterization table for linearity over negative bias voltage
7. A 1 M
W resistor is connected from pin 3 to the ground for the measurement.


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