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M68AF511AM70NC6T Datasheet(PDF) 3 Page - STMicroelectronics |
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M68AF511AM70NC6T Datasheet(HTML) 3 Page - STMicroelectronics |
3 / 18 page 3/18 M68AF511A SUMMARY DESCRIPTION The M68AF511A is a 4 Mbit (4,194,304 bit) CMOS SRAM, organized as 524,288 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal ad- dress access and cycle times. It requires a single 4.5 to 5.5V supply. This device has an automatic power-down feature, reducing the power consumption by over 99% when deselected. The M68AF511A is available in a 32 lead TSOP Type II and 32 lead SO packages. Figure 2. Logic Diagram Table 1. Signal Names AI03948C 19 A0-A18 W DQ0-DQ7 VCC M68AF511A G VSS 8 E A0-A18 Address Inputs DQ0-DQ7 Data Input/Output E Chip Enable G Output Enable W Write Enable VCC Supply Voltage VSS Ground |
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