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OM6211U Datasheet(PDF) 5 Page - NXP Semiconductors |
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OM6211U Datasheet(HTML) 5 Page - NXP Semiconductors |
5 / 48 page 2002 Jan 17 5 Philips Semiconductors Product specification 48 × 84 dot matrix LCD driver OM6211 6 PINNING SYMBOL PAD DESCRIPTION VOS4 3 input pin 4 for VLCD calibration VOS3 4 input pin 3 for VLCD calibration VOS2 5 input pin 2 for VLCD calibration VOS1 6 input pin 1 for VLCD calibration VOS0 7 input pin 0 for VLCD calibration T6 8 to 11 test input 6 RES 16 external reset input (active LOW) T5 17 test input 5 T4 18 test input 4 T3 19 test output 3 T2 20 test output 2 T1 21 test output 1 SCE 22 chip enable input (active LOW) VSS2 23 to 30 ground VSS1 31 to 38 ground OSC 40 oscillator input SDOUT 41 serial data output SDIN 42 serial data input SCLK 43 serial clock input ID4 44 module identification input ID3 45 module identification input MX 46 horizontal mirroring input VDD1 47 to 52 logic supply voltage VDD2 53 to 60 voltage multiplier supply voltage VDD3 61 to 64 voltage multiplier supply voltage VLCDSENSE 65 VLCD generator regulation input VLCDOUT 66 to 72 VLCD generator output VLCDIN 73 to 78 LCD supply voltage input ROW 0 to ROW 23 89 to 112 LCD row driver outputs COL0to COL 83 113 to 196 LCD column driver outputs ROW 47 to ROW 24 197 to 220 LCD row driver outputs 1, 12 to 15, 39, 79, 81 to 88 and 221 to 225 dummy pads SYMBOL PAD DESCRIPTION 7 PIN FUNCTIONS 7.1 ROW 0 to ROW 47 row driver outputs These pads output the display row signals. 7.2 COL 0 to COL 83 column driver outputs These pads output the display column signals. 7.3 VSS1 and VSS2: negative power supply rails Negative power supply rails VSS1 and VSS2 must be connected together, hereafter referred to as VSS. When a pin has to be connected externally to VSS, then pin VSS1 should be used. 7.4 VDD1 to VDD3: positive power supply rails Positive power supply rails: VDD1 for logic supply, VDD2 and VDD3 for voltage multiplier. VDD2 and VDD3 must be connected together, hereafter referred to as VDD2. 7.5 VLCDOUT, VLCDIN and VLCDSENSE: LCD power supply If the internal VLCD generator is used, then all three pins must be connected together. If not (VLCD generator is disabled and an external voltage is applied to VLCDIN), then VLCDOUT must be left open-circuit, VLCDSENSE must be connected to VLCDIN, VDD2 and VDD3 should be applied according to the specified voltage range. The following settings are also required: HVE = 0, S1 = 1 and S0 =0. 7.6 VOS4 to VOS0: calibration inputs Five pull-up input pins for on-glass VLCD calibration. Each pin may be connected to VSS, which corresponds to logic 0, or left open-circuit, which corresponds to logic 1. All five pins define a 5-bit two’s complement number ranging from −16 to 15 decimal (from 10000 to 01111). The default value, with all pins connected to VSS, is 0 decimal (00000). |
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