NCP51402_16 datasheet(1/7 Pages) ONSEMI

Part #	NCP51402

Description	Termination Regulator

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Manufacturer	ONSEMI [ON Semiconductor]

Direct Link	http://www.onsemi.com

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May, 2016 − Rev. 1

1

Publication Order Number:

NCP51402/D

NCP51402

3 Amp VTT Termination

Regulator DDR1, DDR2,

DDR3, LPDDR3, DDR4

The NCP51402 is a source/sink Double Data Rate (DDR)

termination regulator specifically designed for low input voltage and

low−noise systems where space is a key consideration.

The NCP51402 maintains a fast transient response and only requires

a minimum output capacitance of 20

mF. The NCP51402 supports a

remote sensing function and all power requirements for DDR VTT bus

termination. The NCP51402 can also be used in low−power chipsets

and graphics processor cores that require dynamically adjustable

output voltages.

The NCP51402 is available in the thermally−efficient DFN10

Exposed Pad package, and is rated both Green and Pb−free.

Features

• Input Voltage Rails: Supports 2.5 V, 3.3 V and 5 V Rails

• PVCC Voltage Range: 1.1 to 3.5 V

• Integrated Power MOSFETs

• Fast Load−Transient Response

• PGOOD − Logic output pin to Monitor VTT Regulation

• EN − Logic input pin for Shutdown mode

• VRI − Reference Input Allows for Flexible Input Tracking Either

Directly or Through Resistor Divider

• Remote Sensing (VTTS)

• Built−in Under Voltage Lockout and Over Current Limit

• Thermal Shutdown

• Small, Low−Profile 10−pin, 3x3 DFN Package

• These Devices are Pb−Free and are RoHS Compliant

Applications

• DDR Memory Termination

• Desktop PC’s, Notebooks, and Workstations

• Servers and Networking equipment

• Telecom/Datacom, GSM Base Station

• Graphics Processor Core Supplies

• Set Top Boxes, LCD−TV/PDP−TV, Copier/Printers

• Chipset/RAM Supplies as Low as 0.5 V

• Active Bus Termination

(see notes on page 6)

www.onsemi.com

DFN10, 3x3, 0.5P

CASE 506CL

Device

Package

Shipping†

ORDERING INFORMATION

DFN10

(Pb−Free)

3000 / Tape &

Reel

NCP51402MNTXG

PIN CONNECTION

†For information on tape and reel specifications,

including part orientation and tape sizes, please

refer to our Tape and Reel Packaging Specifications

Brochure, BRD8011/D.

MARKING DIAGRAM

51402

= Specific Device Code

A

= Assembly Location

L

= Wafer Lot

Y

= Year

W

= Work Week

G

= Pb−Free Package

51402

ALYW

G

(Note: Microdot may be in either location)

1

2

3

4

5

10

9

8

7

6

VCC

PGOOD

GND

EN

VRO

VRI

PVCC

VTT

PGND

VTTS

GND

+

Exposed Pad

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