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SI786DG Datasheet(PDF) 9 Page - Vishay Siliconix |
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SI786DG Datasheet(HTML) 9 Page - Vishay Siliconix |
9 / 14 page Si786 Vishay Siliconix Document Number: 70189 S-40807—Rev. J, 26-Apr-04 www.vishay.com 9 3.3-V and 5-V Switching Controllers Each PWM controller on the Si786 is identical with the exception of the preset output voltages. The controllers only share three functional blocks (see Figure 2): the oscillator, the voltage reference (REF) and the 5-V logic supply (VL). The 3.3-V and 5-V controllers are independently enabled with pins ON3 and ON5 , respectively. The PWMs are a direct-summing type, without the typical integrating error amplifier along with the phase shift which is a side effect of this type of topology. Feedback compensation is not needed, as long as the output capacitance and its ESR requirements are met, according to the Design Considerations section of this data sheet. The main PWM comparator is an open loop device which is comprised of three comparators summing four signals: the feedback voltage error signal, current sense signal, slope-compensation ramp and voltage reference as shown in Figure 3. This method of control comes closer to the ideal of maintaining the output voltage on a cycle-by-cycle basis. When the load demands high current levels, the controller is in full PWM mode. Every cycle from the oscillator asserts the output latch and drives the gate of the high-side MOSFET for a period determined by the duty cycle (approximately VOUT/VIN 100%) and the frequency. The high-side switch turns off, setting the synchronous rectifier latch and 60ns later, the rectifier MOSFET turns on. The low-side switch stays on until the start of the next clock cycle in continuous mode, or until the inductor current becomes positive again in discontinuous mode. In over-current situations, where the inductor current is greater than the 100-mV current-limit threshold, the high-side latch is reset and the high-side gate drive is shut off. During low-current load requirements, the inductor current will not deliver the 25-mV minimum current threshold. The Minimum Current comparator signals the PWM to enter pulse-skipping mode when the threshold has not been reached. Pulse-skipping mode skips pulses to reduce switching losses, the losses which decrease efficiency the most at light load. Entering this mode causes the minimum current comparator to reset the high-side latch at the beginning of each oscillator cycle. Soft-Start To slowly bring up the 3.3-V and 5-V supplies, connect capacitors from SS3 and SS5 to GND. Asserting ON3 or ON5 starts a 4-mA constant current source to charge these capacitors to 4 V. As the voltage on these pins ramps up, so does the current limit comparator threshold, to increase the duty cycle of the MOSFETs to their maximum level. If ON3 or ON5 are left low, the respective capacitor is discharged to GND. Leaving the SS3 or SS5 pins open will cause either controller to reach the terminal over-current level within 10 ms. Soft start helps prevent current spikes at turn-on and allows separate supplies to be delayed using external programmability. Synchronous Rectifiers Synchronous rectification replaces the Schottky rectifier with a MOSFET, which can be controlled to increase the efficiency of the circuit. When the high-side MOSFET is switched off, the inductor will try to maintain its current flow, inverting the inductor’s polarity. The path of current then becomes the circuit made of the Schottky diode, inductor and load, which will charge the output capacitor. The diode has a 0.5-V forward voltage drop, which contributes a significant amount of power loss, decreasing efficiency. A low-side switch is placed in parallel with the Schottky diode and is turned on just after the diode begins to conduct. Because the rDS(ON) of the MOSFET is low, the I*R voltage drop will not be as large as the diode, which increases efficiency. The low-side rectifier is shut off when the inductor current drops to zero. Shoot-through current is the result when both the high-side and rectifying MOSFETs are turned on at the same time. Break-before-make timing internal to the Si786 manages this potential problem. During the time when neither MOSFET is on, the Schottky is conducting, so that the body diode in the low-side MOSFET is not forced to conduct. Synchronous rectification is always active when the Si786 is powered-up, regardless of the operational mode. Gate-Driver Boost The high-side n-channel drive is supplied by a flying-capacitor boost circuit (see Figure 4). The capacitor takes a charge from VL and then is connected from gate to source of the high-side MOSFET to provide gate enhancement. At power-up, the low-side MOSFET pulls LX_ down to GND and charges the BST_ capacitor connected to 5 V. During the second half of the oscillator cycle, the controller drives the gate of the high-side MOSFET by internally connecting node BST_ to DH_. This supplies a voltage 5 V higher than the battery voltage to the gate of the high-side MOSFET. Oscillations on the gates of the high-side MOSFET in discontinuous mode are a natural occurrence caused by the LC network formed by the inductor and stray capacitance at the LX_ pins. The negative side of the BST_ capacitor is connected to the LX_ node, so ringing at the inductor is translated through to the gate drive. |
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