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SL2101C Datasheet(PDF) 3 Page - Zarlink Semiconductor Inc |
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SL2101C Datasheet(HTML) 3 Page - Zarlink Semiconductor Inc |
3 / 27 page SL2101 Data Sheet 3 Zarlink Semiconductor Inc. Quick Reference Data All data applies at maximum power setting with the following conditions unless otherwise stated; a) nominal loads as follows; 1220 MHz output load as in Figure 4 44 MHz output load as in Figure 5 b) input signal per carrier of 63 dB µV *dBm assumes a 75 Ω characteristic impedance, and 0 dBm = 109 dBµV Functional Description The SL2101 is a broadband wide dynamic range mixer oscillator with on-board I2C bus controlled PLL frequency synthesizer, optimized for application in double conversion tuner systems as both the up and down converter. It also has application in any system where a wide dynamic range broadband synthesized frequency converter is required. The SL2101 is a single chip solution containing all necessary active circuitry and simply requires an external tuneable resonant network for the local oscillator sustaining network. The pin assignment is contained in Figures 2 and 3 for the SSOP and MLP packages and the block diagram in Figure 1. The device also contains a programmable facility to adjust the power in the lna/mixer so allowing power to be traded against intermodulation performance for power critical applications, such as telephony modems. Characteristic Units RF input operating range 50-1400 MHz Input noise figure, SSB, 50-860 MHz 860-1400 6.5 - 8.5 8.5 - 12 dB dB Conversion gain 12 dB CTB (fully loaded matrix) -68 dBc CSO (fully loaded matrix) -65 dBc P1 dB input referred 110 dB µV Local oscillator phase noise as upconverter SSB @ 10 kHz offset SSB @ 100 kHz offset -90 -112 dBc/Hz dBc/Hz Local oscillator phase noise as downconverter SSB @ 10 kHz offset SSB @ 100 kHz offset -93 -115 dBc/Hz dBc/Hz Local oscillator phase noise floor -136 dBc/Hz PLL spurs on converted output with input @ 60 dB µV<-70 dBc PLL maximum comparison frequency 4 MHz PLL phase noise at phase detector -152 dBc/Hz |
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