TPS2371

SLUS566A − JULY 2003 − REVISED NOVEMBER 2003

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APPLICATION INFORMATION

Using EN_DC as a SoftStart or a PowerGood Function

The EN_DC pin is an output intended for use as a soft-start for a dc-to-dc converter. During the initial turn-on

of the pass FET, an internal 80-

µA current sink is enabled on the EN_DC pin. This internal current sink is

removed only after the load capacitance has been charged to within 1.5-V of the supply voltage. By connecting

the EN_DC output to the soft start capacitor of a dc-to-dc converter, the internal current sink keeps the dc-to-dc

converter off during startup. Once the voltage across the converter has reached within 1.5 V of full voltage, the

dc-to-dc converter is allowed to soft start. A 5-V zener diode connected between EN_DC and RTN is required

for operation in this architecture.

For operation as a powergood output, the EN_DC requires an external pull-up.

A 1-M

Ω resistor is

recommended. The EN_DC output also requires a clamp to limit the output voltage to within recommended

operating levels. A 5-V zener diode connected between EN_DC and RTN (pin 5 of the TPS2371) is

recommended. This configuration allows the EN_DC pin to act as an open drain output with which many

designers are more familiar.

SURGE SUPPRESSION

As specified in the Absolute Maximum Ratings table, the absolute maximum input voltage of the TPS2371 is

68 V. The IEEE 802.3af Power-Over-Ethernet Standard specifies the voltage range of PSE output is between

44 V asd 57 V. This PSE output voltage range would be reduced by cable, connector and other IR drops

between the PSE and the TPS2371 in the PD. However, the use of extended cable lengths and transformers

in some applications may induce transients in excess of 68 V during a hot plug event. To manage these transient

events and keep them from significantly exceeding the application’s maximum voltage, a transorb such as the

SMAJ54A should be placed between the positive input supply, VDD (pin 8), and the negative input supply, VEE

(pin 4). This, combined with a 0.1-

µF bypass capacitor in parallel with the transorb helps to protect the TPS2371

from damage caused by transients during hot plug events. The transorb or zener diode should be selected such

that it does not zener below the maximum required application voltage of 57 V, but before reaching the 68-V

absolute maximum rating. For layout purposes, the 0.1-

µF capacitor should be placed as close as possible to

the device; the transorb or zener diode should be placed as close to the supply connector as possible. Based

on the nature of the PD application, these measures should be considered an implementation requirement.

USE OF BARREL RECTIFIERS

Many applications use barrel rectifiers after the RJ-45 connector in order to be polarity insensitive. Barrel

rectifiers in front of the TPS2371 cause the voltages at the device to be lower than the voltages at the RJ-45.

The TPS2371 allows for this and is IEEE802.3af compliant during the detection and classification phases. For

the detection phase, the device begins detection for voltages as low as 1.3 V across the supply pins. For the

optional classification phase, the device is guaranteed to start classification below 14 V across the supply pins.

Once classification has been engaged, it becomes latched-in and further voltage drops due to cable resistance

and class current does not cause it to switch out of classification. However, in cases where the PSE is operating

at minimum class voltage (15.5 V) and there is a 20-

Ω, 100-m cable between the PSE and the PD, Class 3

devices may not classify correctly when using barrel rectifiers. Class 3 device designs should include schottky

diodes to handle all corner cases or switch to Class 0 devices when using barrel rectifiers.

Thermal Shutdown

In the event of a short circuit or overload condition, the TPS2371 begins to heat up until thermal shutdown is

reached. Once thermal shutdown is reached, the internal FET is switched off, removing the load from the supply.

After the device has cooled sufficiently, it retries by restarting the internal FET. If the overload or short is not

removed, the device cycles thermal shutdown seven times before latching the internal FET off. Once the internal

FET is latched off, power needs to be cycled to reset the latch.