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TPS73130 Datasheet(PDF) 11 Page - Texas Instruments |
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TPS73130 Datasheet(HTML) 11 Page - Texas Instruments |
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11 / 16 page  www.ti.com APPLICATION INFORMATION INPUT AND OUTPUT CAPACITOR OUTPUT NOISE TPS731xx GND EN NR IN OUT V IN V OUT Optional input capacitor. May improve source impedance, noise, or PSRR. Optional output capacitor. May improve load transient, noise, or PSRR. Optional bypass capacitor to reduce output noise. V N + 32mVRMS (R 1 ) R2) R 2 + 32mVRMS V OUT V REF (1) V N(mVRMS) + 27 mVRMS V V OUT(V) (2) TPS731xx GND EN FB IN OUT V IN V OUT V OUT = × 1.204 (R 1 + R2) R 1 C FB R 2 Optional input capacitor. May improve source impedance, noise, or PSRR. Optional output capacitor. May improve load transient, noise, or PSRR. Optional capacitor reduces output noise. R2 V N(mVRMS) + 8.5 mVRMS V V OUT(V) (3) TPS73101, TPS73115, TPS73118 TPS73125, TPS73130, TPS73132 TPS73133, TPS73150 SBVS034E – SEPTEMBER 2003 – REVISED SEPTEMBER 2004 The TPS731xx belongs to a family of new generation LDO regulators that use an NMOS pass transistor to REQUIREMENTS achieve ultra-low-dropout performance, reverse cur- rent blockage, and freedom from output capacitor Although an input capacitor is not required for stab- constraints. These features, combined with low noise ility, it is good analog design practice to connect a and an enable input, make the TPS731xx ideal for 0.1µF to 1µF low ESR capacitor across the input portable applications. This regulator family offers a supply near the regulator. This counteracts reactive wide selection of fixed output voltage versions and an input sources and improves transient response, noise adjustable output version. All versions have thermal rejection, and ripple rejection. A higher-value capaci- and over-current protection, including foldback cur- tor may be necessary if large, fast rise-time load rent limit. transients are anticipated or the device is located several inches from the power source. Figure 31 shows the basic circuit connections for the fixed voltage models. Figure 32 gives the connections The TPS731xx does not require an output capacitor for the adjustable output version (TPS73101). for stability and has maximum phase margin with no capacitor. It is designed to be stable for all available types and values of capacitors. In applications where VIN - VOUT < 0.5V and multiple low ESR capacitors are in parallel, ringing may occur when the product of COUT and total ESR drops below 50nΩF. Total ESR includes all parasitic resistances, including capacitor ESR and board, socket, and solder joint resistance. In most applications, the sum of capacitor ESR and trace resistance will meet this requirement. A precision band-gap reference is used to generate the internal reference voltage, VREF. This reference is the dominant noise source within the TPS731xx and Figure 31. Typical Application Circuit for it generates approximately 32µVRMS (10Hz to Fixed-Voltage Versions 100kHz) at the reference output (NR). The regulator control loop gains up the reference noise with the same gain as the reference voltage, so that the noise voltage of the regulator is approximately given by: Since the value of VREF is 1.2V, this relationship reduces to: for the case of no CNR. An internal 27k Ω resistor in series with the noise Figure 32. Typical Application Circuit for reduction pin (NR) forms a low-pass filter for the Adjustable-Voltage Versions voltage reference when an external noise reduction capacitor, CNR, is connected from NR to ground. For R1 and R2 can be calculated for any output voltage CNR = 10nF, the total noise in the 10Hz to 100kHz using the formula shown in Figure 32. Sample re- bandwidth is reduced by a factor of ~3.2, giving the sistor values for common output voltages are shown approximate relationship: in Figure 2. For best accuracy, make the parallel combination of R1 and R2 approximately 19kΩ. for CNR = 10nF. 11 |
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