NCP81381

www.onsemi.com

3

Pin No.

Description

Symbol

19

PGND

Power Ground

20

PGND

Power Ground

21

PGND

Power Ground

22

PGND

Power Ground

23

PGND

Power Ground

24

PGND

Power Ground

25

VIN

Conversion Supply Power Input

26

VIN

Conversion Supply Power Input

27

VIN

Conversion Supply Power Input

28

VIN

Conversion Supply Power Input

29

VIN

Conversion Supply Power Input

30

VIN

Conversion Supply Power Input

31

PGND

Power Ground

32

PHASEF

Bootstrap Capacitor Return (must be connected to PHASED)

33

GH

High Side FET Gate Access

34

PHASED

Driver Phase Connection (must be connected to PHASEF)

35

BOOT

Bootstrap Voltage

36

ZCD_EN

PWM drive logic and zero current detection enable. 3−state input:

PWM = High

³ GH is high, GL is low.

PWM = Mid

³ Diode emulation mode.

PWM = Low

³ GH is low. State of GL is dependent on states of SMOD# and ZCD_EN

(see Table 1 LOGIC TABLE).

37

PGND

Power Ground

38

TEST

No connection should be made to this pin. No pad is needed on the PCB footprint

Pin Name

Min

Max

Unit

VCC, VCCD

−0.3

6.5

V

GH to PHASED (DC)

−0.3

V

GH to PHASED (< 50 ns)

−5

7.7

V

VIN

−0.3

30

V

BOOT (DC)

−0.3

35

V

BOOT (< 20 ns)

−0.3

40

V

BOOT to PHASED (DC)

−0.3

6.5

V

VSW, PHASED, PHASEF (DC)

−0.3

30

V

VSW, PHASED, PHASEF (< 5 ns)

−5

37

V

All Other Pins

−0.3

V

Single−Pulse Drain−to−Source Avalanche Energy, High−Side FET

144

mJ

Single−Pulse Drain−to−Source Avalanche Energy, Low−Side FET

180

mJ

Single−Pulse Drain−to−Source Avalanche Energy, High−Side FET

200

mJ

Single−Pulse Drain−to−Source Avalanche Energy, Low−Side FET

200

mJ

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality

should not be assumed, damage may occur and reliability may be affected.

1. Absolute Maximum Ratings are not tested in production.