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NCP81382MNTXG Datasheet(PDF) 9 Page - ON Semiconductor |
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NCP81382MNTXG Datasheet(HTML) 9 Page - ON Semiconductor |
9 / 16 page NCP81382 www.onsemi.com 9 If VSMOD#_LO < SMOD# < VSMOD#_HI (Mid−State), internal resistances will set undriven PWM pin voltage to Mid−State. Disable Input (DISB#) The DISB# pin is used to disable the GH to the High−Side FET to prevent power transfer. The pin has a pull−down resistance to force a disabled state when it is left unconnected. DISB# can be driven from the output of a logic device or set high with a pull−up resistance to VCC. VCC Undervoltage Lockout The VCC pin is monitored by an Undervoltage Lockout Circuit (UVLO). VCC voltage above the rising threshold enables the NCP81382. Table 2. UVLO/DISB# LOGIC TABLE UVLO DISB# Driver State L X Disabled (GH = GL = 0) H L Disabled (GH = GL = 0) H H Enabled (See Table x) H Open Disabled (GH = GL = 0) Thermal Warning/Thermal Shutdown Output The THWN pin is an open drain output. When the temperature of the driver exceeds TTHWN, the THWN pin will be pulled low indicating a thermal warning. At this point, the part continues to function normally. When the temperature drops TTHWN_HYS below TTHWN, the THWN pin will go high. If the driver temperature exceeds TTHDN, the part will enter thermal shutdown and turn off both MOSFETs. Once the temperature falls TTHDN_HYS below TTHDN, the part will resume normal operation. Skip Mode Input (SMOD#) The SMOD# tri−state input pin has an internal pull−up resistance to VCC. When driven high, the SMOD# pin enables the low side synchronous MOSFET to operate independently of the internal ZCD function. When the SMOD# pin is set low during the PWM cycle it disables the low side MOSFET to allow discontinuous mode operation. The NCP81382 has the capability of internally connecting a resistor divider to the PWM pin. To engage this mode, SMOD# needs to be placed into mid−state. While in SMOD# mid−state, the IC logic is equivalent to SMOD# being in the high state. Figure 6. PWM Timing Diagram ZCD_EN PWM GH GL Inductor Current 250 ns 80 ns De-bounce timer ZCD blanking timer ZCD detected 250 ns 80 ns ZCD blanking timer ZCD waits until timers expire ZCD_EN PWM GH GL Inductor Current De-bounce timer NOTES: If the Zero Current Detect circuit detects zero current after the ZCD Wait timer period, the GL is driven low by the Zero Current Detect signal. If the Zero Current Detect circuit detects zero current before the ZCD Wait timer period has expired, the Zero Current detect signal is ignored and the GL is driven low at the end of the ZCD Wait timer period. |
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