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A3959 Datasheet(PDF) 4 Page - Allegro MicroSystems |
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A3959 Datasheet(HTML) 4 Page - Allegro MicroSystems |
4 / 12 page 3959 DMOS FULL-BRIDGE PWM MOTOR DRIVER 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 4 ELECTRICAL CHARACTERISTICS at TA = +25°C, VBB = 50 V, VDD = 5.0 V, VSENSE = 0.5 V, fPWM < 50 kHz (unless noted otherwise), continued. Limits Characteristics Symbol Test Conditions Min. Typ. Max. Units Control Logic Reference Divider Ratio – – 10 – – Gm Error EGm VREF = VDD –– ±4.0 % (Note 3) VREF = 0.5 V – – ±14 % Propagation Delay Times tpd 0.5 Ein to 0.9 Eout: PWM change to source on 600 750 1200 ns PWM change to source off 50 150 350 ns PWM change to sink on 600 750 1200 ns PWM change to sink off 50 100 150 ns Thermal Shutdown Temp. TJ – 165 – °C Thermal Shutdown Hysteresis ∆T J –15 – °C UVLO Enable ThresholdUVLO Increasing VDD 3.90 4.2 4.45 V UVLO Hysteresis ∆UVLO 0.05 0.10 – V Logic Supply Current IDD fPWM < 50 kHz – 6.0 10 mA Sleep Mode – – 2.0 mA NOTES: 1. Typical Data is for design information only. 2. Negative current is defined as coming out of (sourcing) the specified device terminal. 3. Gm error = ([VREF/10] – VSENSE)/(VREF/10) where VSENSE = ITRIP•RS. |
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