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74AUP1G98 Datasheet(PDF) 4 Page - Diodes Incorporated |
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74AUP1G98 Datasheet(HTML) 4 Page - Diodes Incorporated |
4 / 17 page 74AUP1G98 Document number: DS36855 Rev. 1 - 2 4 of 17 www.diodes.com June 2015 © Diodes Incorporated 74AUP1G98 Logic Configurations Y B 4 3 2 5 6 1 Vcc 2 to 1 Data Selector Configuration 1 A C B A Y C When C is = L, Y=B; When C is H, Y=A 2-Input NAND Gate 2-Input OR Gate with Both Inputs Inverted Configuration 2 A C Y A Y C 4 3 2 5 6 1 Vcc 2-Input NAND Gate with B Input Inverted 2-Input OR Gate with A Input Inverted Configuration 3 A Y C 4 3 2 5 6 1 Vcc Y C A C A Y 2-Input OR Gate with One Input Inverted 2-Input NAND Gate with One Input Inverted Configuration 4 Y C B C B Y B Y C 4 3 2 5 6 1 Vcc 2-Input NOR Gate Configuration 5 Y C B B Y C 4 3 2 5 6 1 Vcc Buffer Configuration 6 Y C 6 3 2 5 4 1 Vcc Y C Function Selection Table Logic Function Configuration 2-to-1 Data Selector with inverted output 1 2-Input NAND gate 2 2-Input AND with inverted input 3 2-Input NOR with inverted input 3 2-Input NAND with one inverted input 4 2-Input OR with one inverted input 4 2-Input NOR 5 1-Input Buffer 6 |
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