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NCP432BISNT1G Datasheet(PDF) 11 Page - ON Semiconductor |
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NCP432BISNT1G Datasheet(HTML) 11 Page - ON Semiconductor |
11 / 17 page NCP431A, SC431A, NCP431B, SC431B, NCP432B, SC432B Series www.onsemi.com 11 APPLICATIONS INFORMATION The NCP431/NCP432 is a programmable precision reference which is used in a variety of ways. It serves as a reference voltage in circuits where a non−standard reference voltage is needed. Other uses include feedback control for driving an optocoupler in power supplies, voltage monitor, constant current source, constant current sink and series pass regulator. In each of these applications, it is critical to maintain stability of the device at various operating currents and load capacitances. In some cases the circuit designer can estimate the stabilization capacitance from the stability boundary conditions curve provided in Figure 18. However, these typical curves only provide stability information at specific cathode voltages and at a specific load condition. Additional information is needed to determine the capacitance needed to optimize phase margin or allow for process variation. A simplified model of the NCP431/NCP432 is shown in Figure 33. When tested for stability boundaries, the load resistance is 150 W. The model reference input consists of an input transistor and a dc emitter resistance connected to the device anode. A dependent current source, Gm, develops a current whose amplitude is determined by the difference between the 1.78 V internal reference voltage source and the input transistor emitter voltage. A portion of Gm flows through compensation capacitance, CP2. The voltage across CP2 drives the output dependent current source, Go, which is connected across the device cathode and anode. Model component values are: Vref = 1.78 V Gm = 0.3 + 2.7 exp (−IC/26 mA) where IC is the device cathode current and Gm is in mhos Go = 1.25 (Vcp2) mmhos. Resistor and capacitor typical values are shown on the model. Process tolerances are ±20% for resistors, ±10% for capacitors, and ±40% for transconductances. An examination of the device model reveals the location of circuit poles and zeroes: P1 + 1 2 pR GMCP1 + 1 2 p @ 1.0M @ 20 pF + 7.96 kHz P2 + 1 2 pR P2CP2 + 1 2 p @ 10M @ 0.265 pF + 60 kHz Z1 + 1 2 pR Z1CP1 + 1 2 p @ 15.9k @ 20 pF + 500 kHz In addition, there is an external circuit pole defined by the load: P L + 1 2 pR LCL Also, the transfer dc voltage gain of the NCP431 is: G + G MRGMGoRL Example 1: IC=10 mA, RL= 230 W,CL= 0. Define the transfer gain. The DC gain is: G + G MRGMGoRL + (2.138)(1.0M)(1.25 m)(230) + 615 + 56 dB Loop gain + G 8.25k 8.25k ) 15k + 218 + 47 dB The resulting transfer function Bode plot is shown in Figure 34. The asymptotic plot may be expressed as the following equation: Av + 615 1 ) jf 500 kHz 1 ) jf 8.0 kHz 1 ) jf 60 kHz The Bode plot shows a unity gain crossover frequency of approximately 600 kHz. The phase margin, calculated from the equation, would be 55.9 °. This model matches the Open−Loop Bode Plot of Figure 15. The total loop would have a unity gain frequency of about 300 kHz with a phase margin of about 44 °. Figure 33. Simplified NCP431/NCP432 Device Model |
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