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TPS650942 Datasheet(PDF) 2 Page - Texas Instruments

Part # TPS650942
Description  PMIC for Intel Apollo Lake Platform
Download  92 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TPS650942 Datasheet(HTML) 2 Page - Texas Instruments

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background image
IRQB
Control
Outputs
REFSYS
REGISTERS
Digital Core
Thermal
monitoring
Thermal shutdown
OTP
TEST CTRL
I
2C CTRL
SLP_S0B
PCH_PWROK
RSMRSTB
PROCHOT
Internal
Interrupt
Events
<PGND_BUCK3>
BUCK3
Default: 1.05 V
3 A
VREF
BUCK1
Default: 1V
Typical
Application
Usage:
0.5 V to 1.45 V
(DVS)
5 A
VSYS
LDOA2
0.7 V to 1.5 V
600 mA
Control
Inputs
SoC
VSYS
LOAD SWB2
400 mA
PMICEN
SLP_S3B
SLP_S4B
LDOLS_EN
(a)
SWA1_EN
(b)
THERMTRIPB
VSYS
LDO5
LDO3P3
V5ANA
BUCK5V
nPUC
BOOT1
DRVH1
SW1
DRVL1
FBVOUT1
PGNDSNS1
ILIM1
BUCK2
Default: 0V
Typical
Application
Usage:
0.5 V to 1.45 V
(DVS)
21 A
VSYS
BOOT2
DRVH2
SW2
DRVL2
FBVOUT2
PGNDSNS2
ILIM2
PVIN3
LX3
FB3
BUCK5V
<PGND_BUCK4>
BUCK4
Default: 1.8 V
2 A
PVIN4
LX4
FB4
<PGND_BUCK5>
BUCK5
Default: 1.24 V
2 A
PVIN5
LX5
FB5
BUCK5V
BUCK6
Default: OTP
Dependent
7 A
VSYS
BOOT6
DRVH6
SW6
DRVL6
FBVOUT6
PGNDSNS6
ILIM6
LDO5V
VNN
VTT_LDO
½ × VDDQ
ILIM set by OTP
VDDQ
VTT
PVINVTT
VTT
VTTFB
LDOA1
1.35 V to 3.3 V
1.8 V
(b)
200 mA
V1P8A
CLK
DATA
LOAD SWB1
400 mA
LOAD SWA1
300 mA
LDOA3
0.7 V to 1.5 V
600 mA
AGND
VCCGI
VCCRAM
V1P8A
V1P24A
FBGND2
VSET
EN
VSET
EN
VSET
EN
VSET
EN
VSET
EN
VSET
EN
EN
EN
LDO5V
BUCK5V
EC
0.5 V to 3.3 V
V1P8A
GPO
Dashed connections optional.
Refer to Pin Attributes for
connection if unused.
(1) LPDDR3 and LPDDR4
(2) DDR3L
(a) LDOA1
1RW ³$OZD\V 2Q´
(b) LDOA1
³$OZD\V 2Q´
Optional
(a)
Required
(b)
V1P8A
(1)
0.5 V to 3.3 V
(2)
Copyright © 2016, Texas Instruments Incorporated
2
TPS65094, TPS650940, TPS650941, TPS650942, TPS650944
SWCS133A – SEPTEMBER 2015 – REVISED JUNE 2016
www.ti.com
Submit Documentation Feedback
Product Folder Links: TPS65094
Device Overview
Copyright © 2015–2016, Texas Instruments Incorporated
1.4
Functional Block Diagram
Figure 1-1. PMIC Functional Block Diagram


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