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TPS659121 Datasheet(PDF) 8 Page - Texas Instruments |
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TPS659121 Datasheet(HTML) 8 Page - Texas Instruments |
8 / 145 page TPS659121, TPS659122 SWCS071B – AUGUST 2012 – REVISED APRIL 2015 www.ti.com Signal Descriptions for TPS65912x (continued) TERMINAL TYPE DESCRIPTION NAME ALT NAME NO. Active low, debounced power-on input or power-request input to start power-up sequencing; alternatively active-low reset input to nPWRON /RESIN (optional) D3 I TPS65912x; debounced by 10 ms (OTP option); tie to LDOAO for a logic high if not used. Input from OMAP WDI pin to AND gate; alternatively 32-kHz RC OMAP_WDI_32k_OUT F6 I oscillator output Push-pull output at VDDIO level of AND gate; connect to CPCAP WDI CPCAP_WDI G7 O input Selects predefined startup options and default voltages; chooses from CONFIG1 E2 I two internal OTP settings; tie to GND or LDOAO Selects predefined startup options; configures pins as DCDC1_SEL, DCDC2_SEL, DCDC3_SEL and DCDC4_SEL as well as CLK_REQ CONFIG2 D2 I and PWR_REQ signals with CONFIG2 tied to GND. Tie to LDOAO for a logic high level. VCC H2 I Digital supply input Supply voltage input for GPIOs and output stages that sets the HIGH VDDIO F7 I level voltage (I/O voltage) DGND E3 – Digital GND connection, tie to AGND and PGNDx on the PCB 8 Terminal Configuration and Functions Copyright © 2012–2015, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TPS659121 TPS659122 |
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