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TPS70612DBVR Datasheet(PDF) 11 Page - Texas Instruments |
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TPS70612DBVR Datasheet(HTML) 11 Page - Texas Instruments |
11 / 31 page Thermal Shutdown Current Limit Bandgap IN EN OUT Logic GND Device TPS706 www.ti.com SBVS245A – OCTOBER 2014 – REVISED MARCH 2015 7 Detailed Description 7.1 Overview The TPS706 series are ultralow quiescent current, low-dropout (LDO) linear regulators. The TPS706 offers reverse current protection to block any discharge current from the output into the input. The TPS706 also features current limit and thermal shutdown for reliable operation. 7.2 Functional Block Diagram 7.3 Feature Description 7.3.1 Undervoltage Lockout (UVLO) The TPS706 uses an undervoltage lockout (UVLO) circuit to keep the output shut off until the internal circuitry operates properly. 7.3.2 Shutdown The enable pin (EN) is active high. Enable the device by forcing the EN pin to exceed VEN(HI) (0.9 V, minimum). Turn off the device by forcing the EN pin to drop below 0.4 V. If shutdown capability is not required, connect EN to IN. 7.3.3 Reverse Current Protection The TPS706 has integrated reverse current protection. Reverse current protection prevents the flow of current from the OUT pin to the IN pin when output voltage is higher than input voltage. The reverse current protection circuitry places the power path in high impedance when the output voltage is higher than the input voltage. This setting reduces leakage current from the output to the input to 10 nA, typical. The reverse current protection is always active regardless of the enable pin logic state or if the OUT pin voltage is greater than 1.8 V. Reverse current can flow if the output voltage is less than 1.8 V and if input voltage is less than the output voltage. If voltage is applied to the input pin, then the maximum voltage that can be applied to the OUT pin is the lower of three times the nominal output voltage or 6.5 V. For example, if the 1.2-V output voltage version is used, then the maximum reverse bias voltage that can be applied to the OUT pin is 3.6 V. If the 3.3-V output voltage version is used, then the maximum reverse bias voltage that can be applied to the OUT pin is 6.5 V. Copyright © 2014–2015, Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Links: TPS706 |
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