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DS1747-70IND Datasheet(PDF) 2 Page - Dallas Semiconductor

Part # DS1747-70IND
Description  Y2K-Compliant, Nonvolatile Timekeeping RAMs
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Manufacturer  DALLAS [Dallas Semiconductor]
Direct Link  https://www.maximintegrated.com/en.html
Logo DALLAS - Dallas Semiconductor

DS1747-70IND Datasheet(HTML) 2 Page - Dallas Semiconductor

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DS1747/DS1747P Y2K-Compliant, Nonvolatile Timekeeping RAMs
2 of 18
PIN DESCRIPTION
A0–A18
– Address Input
CE
– Chip Enable
OE
– Output Enable
WE
– Write Enable
VCC
– Power-Supply Input
GND
– Ground
DQ0–DQ7
– Data Input/Output
N.C.
– No Connection
RST
– Power-On Reset Output (PowerCap Module board only)
X1, X2
– Crystal Connection
VBAT
– Battery Connection
ORDERING INFORMATION
PART
TEMP RANGE
PIN-PACKAGE
TOP MARK
DS1747-70
0°C to +70°C
32 EDIP (0.740a)
DS1747-70
DS1747-70IND
-40°C to +85°C
32 EDIP (0.740a)
DS1747-70 IND
DS1747P-70
0°C to +70°C
34 PowerCap
DS1747P-70
DS1747P-70IND
-40°C to +85°C
34 PowerCap
DS1747P-70 IND
DS1747W-120
0°C to +70°C
32 EDIP (0.740a)
DS1747W-120
DS1747W-120IND
-40°C to +85°C
32 EDIP (0.740a)
DS1747W-120 IND
DS1747WP-120
0°C to +70°C
34 PowerCap
DS1747WP-120
DS1747WP-120IND
-40°C to +85°C
34 PowerCap
DS1747WP-120 IND
DESCRIPTION
The DS1747 is a full-function, year-2000-compliant (Y2KC), real-time clock/calendar (RTC) and
512k x 8 nonvolatile static RAM. User access to all registers within the DS1747 is accomplished with a
byte-wide interface as shown in Figure 1. The RTC information and control bits reside in the eight
uppermost RAM locations. The RTC registers contain century, year, month, date, day, hours, minutes,
and seconds data in 24-hour BCD format. Corrections for the date of each month and leap year are made
automatically. The RTC clock registers are double buffered to avoid access of incorrect data that can
occur during clock update cycles. The double-buffered system also prevents time loss as the
timekeeping countdown continues unabated by access to time register data. The DS1747 also contains
its own power-fail circuitry that deselects the device when the VCC supply is in an out-of-tolerance
condition. This feature prevents loss of data from unpredictable system operation brought on by low VCC
as errant access and update cycles are avoided.


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