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TPS77633DR Datasheet(PDF) 6 Page - Texas Instruments |
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TPS77633DR Datasheet(HTML) 6 Page - Texas Instruments |
6 / 31 page t t V res (1) V IN Threshold Voltage V OUT V IT+ (2) RESET Output 200msDelay 200msDelay Output Undefined V IT+ (2) V IT- (2) Lessthan5%ofthe outputvoltage V IT- (2) t Output Undefined V res (1) TYPICAL CHARACTERISTICS TPS775xx, TPS776xx SLVS232J – SEPTEMBER 1999 – REVISED MARCH 2009.............................................................................................................................................. www.ti.com TPS775xx RESET Timing Diagram (1) Vres is the minimum input voltage for a valid RESET. The symbol Vres is not currently listed within EIA or JEDEC standards for semiconductor symbology. (2) VIT: Trip voltage is typically 5% lower than the output voltage (95% VOUT). VIT– to VIT+ is the hysteresis voltage. Table of Graphs FIGURE NO. vs Output Current Figure 3, Figure 4, Figure 5 VOUT Output Voltage vs Free-Air Temperature Figure 6, Figure 7, Figure 8 vs Time Figure 20 IGND Ground Current vs Free-Air Temperature Figure 9 PSRR Power-Supply Ripple Rejection vs Frequency Figure 10 Output Spectral Noise Density vs Frequency Figure 11 ZOUT Output Impedance vs Frequency Figure 12 vs Input Voltage Figure 13 VDO Dropout Voltage vs Free-Air Temperature Figure 14 VIN Input Voltage (Min) vs Output Voltage Figure 15 LINE Line Transient Response Figure 16, Figure 18 LOAD Load Transient Response Figure 17, Figure 19 ESR Equivalent Series Resistance vs Output Current Figure 22, Figure 23 6 Submit Documentation Feedback Copyright © 1999–2009, Texas Instruments Incorporated |
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