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IDT7028L20PFI Datasheet(PDF) 7 Page - Integrated Device Technology |
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IDT7028L20PFI Datasheet(HTML) 7 Page - Integrated Device Technology |
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7 / 17 page  6.42 IDT7028L High-Speed 64K x 16 Dual-Port Static RAM Industrial and Commercial Temperature Ranges 7 AC Electrical Characteristics Over the Operating Temperature and Supply Voltage(5) NOTES: 1. Transition is measured 0mV from Low or High-impedance voltage with Output Test Load (Figure 2). 2. This parameter is guaranted by device characterization, but is not production tested. 3. To access RAM, CE= VIL and SEM = VIH. To access semaphore, CE = VIH and SEM = VIL. Either condition must be valid for the entire tEW time. 4. The specification for tDH must be met by the device supplying write data to the RAM under all operating conditions. Although tDH and tOW values will vary over voltage and temperature, the actual tDH will always be smaller than the actual tOW. 5. Industrial Temperature: for specific speeds, packages and powers contact your sales office. AC Electrical Characteristics Over the Operating Temperature and Supply Voltage Range(5) 7028L15 Com'l Only 7028L20 Com'l Only Unit Symbol Parameter Min. Max. Min. Max. READ CYCLE tRC Read Cycle Time 15 ____ 20 ____ ns tAA Address Access Time ____ 15 ____ 20 ns tACE Chip Enable Access Time(4) ____ 15 ____ 20 ns tABE Byte Enable Access Time(4) ____ 15 ____ 20 ns tAOE Output Enable Access Time ____ 10 ____ 12 ns tOH Output Hold from Address Change 3 ____ 3 ____ ns tLZ Output Low-Z Time(1,2) 3 ____ 3 ____ ns tHZ Output High-Z Time(1,2) ____ 10 ____ 10 ns tPU Chip Enable to Power Up Time(2) 0 ____ 0 ____ ns tPD Chip Disable to Power Down Time(2) ____ 15 ____ 20 ns tSOP Semaphore Flag Update Pulse ( OE or SEM)10 ____ 10 ____ ns tSAA Semaphore Address Access Time ____ 15 ____ 20 ns 4836 tbl 12 Symbol Parameter 7028L15 Com'l Only 7028L20 Com'l Only Unit Min. Max. Min. Max. WRITE CYCLE tWC Write Cycle Time 15 ____ 20 ____ ns tEW Chip Enable to End-of-Write(3) 12 ____ 15 ____ ns tAW Address Valid to End-of-Write 12 ____ 15 ____ ns tAS Address Set-up Time(3) 0 ____ 0 ____ ns tWP Write Pulse Width 12 ____ 15 ____ ns tWR Write Recovery Time 0 ____ 0 ____ ns tDW Data Valid to End-of-Write 10 ____ 15 ____ ns tHZ Output High-Z Time(1,2) ____ 10 ____ 10 ns tDH Data Hold Time(4) 0 ____ 0 ____ ns tWZ Write Enable to Output in High-Z(1,2) ____ 10 ____ 10 ns tOW Output Active from End-of-Write(1,2,4) 0 ____ 0 ____ ns tSWRD SEM Flag Write to Read Time 5 ____ 5 ____ ns tSPS SEM Flag Contention Window 5 ____ 5 ____ ns 4836 tbl 13 |
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