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TSB83AA22C Datasheet(PDF) 2 Page - Texas Instruments |
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TSB83AA22C Datasheet(HTML) 2 Page - Texas Instruments |
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2 / 115 page  www.ti.com Contents TSB83AA22C IEEE Std 1394b-2002 PHY and OHCI Link Device SLLS802 – FEBRUARY 2007 1 Introduction ......................................................................................................................... 9 1.1 Features ....................................................................................................................... 9 1.2 Description .................................................................................................................. 10 1.3 Terminal Assignments (Top View) ....................................................................................... 14 1.3.1 Signals Sorted by Terminal Number ..................................................................................... 15 1.3.2 Signals Sorted by Name .................................................................................................. 16 1.3.3 Terminal Functions ......................................................................................................... 17 2 Electrical Characteristics ..................................................................................................... 24 2.1 Absolute Maximum Ratings ............................................................................................... 24 2.2 Dissipation Ratings ......................................................................................................... 24 2.3 Recommended Operating Conditions ................................................................................... 24 2.4 Electrical Characteristics, PHY Driver ................................................................................... 26 2.5 Electrical Characteristics, PHY Receiver ................................................................................ 26 2.6 Electrical Characteristics, General ....................................................................................... 27 2.7 Thermal Characteristics ................................................................................................... 27 2.8 Switching Characteristics for PHY Portion .............................................................................. 28 2.9 Switching Characteristics for PCI Interface ............................................................................. 28 3 PHY Section Register Configuration ..................................................................................... 29 4 PHY Section Application Information .................................................................................... 35 4.1 Power-Class Programming ............................................................................................... 35 4.2 Power-Up Reset ........................................................................................................... 37 4.3 Crystal Oscillator Selection ............................................................................................... 37 4.4 Bus Reset ................................................................................................................... 38 5 Principles of Operation (IEEE Std 1394b-2002 Interface) ......................................................... 40 5.1 LLC Section Service Request ............................................................................................ 41 5.2 Status Transfer ............................................................................................................. 44 5.3 Receive ...................................................................................................................... 46 5.4 Transmit ..................................................................................................................... 49 6 TSB83AA22C Link Layer Controller Programming Model ........................................................ 51 6.1 PCI Configuration Registers .............................................................................................. 51 6.1.1 Vendor ID Register .............................................................................................. 52 6.1.2 Device ID Register .............................................................................................. 52 6.1.3 Command Register .............................................................................................. 52 6.1.4 Status Register .................................................................................................. 53 6.1.5 Revision ID Register ............................................................................................ 54 6.1.6 Class Code Register ............................................................................................ 55 6.1.7 Cache Line Size Register ...................................................................................... 56 6.1.8 Latency Timer Register ......................................................................................... 56 6.1.9 Header Type Register .......................................................................................... 56 6.1.10 Built-In Self-Test (BIST) Register .............................................................................. 57 6.1.11 OHCI Base Address Register .................................................................................. 57 6.1.12 TI Extension Base Address Register ......................................................................... 58 6.1.13 CardBus CIS Base Address Register ......................................................................... 58 6.1.14 CardBus CIS Pointer Register ................................................................................. 59 6.1.15 Subsystem Vendor ID Register ................................................................................ 60 6.1.16 Subsystem ID Register ......................................................................................... 60 6.1.17 Power Management Capabilities Pointer Register .......................................................... 60 6.1.18 Interrupt Line Register .......................................................................................... 61 6.1.19 Interrupt Pin Register ........................................................................................... 61 6.1.20 Minimum Grant Register ........................................................................................ 61 Contents 2 Submit Documentation Feedback |
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