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ADT7483A Datasheet(PDF) 11 Page - ON Semiconductor

Part # ADT7483A
Description  Dual Channel Temperature Sensor and Over Temperature Alarm
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Manufacturer  ONSEMI [ON Semiconductor]
Direct Link  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

ADT7483A Datasheet(HTML) 11 Page - ON Semiconductor

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ADT7483A
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Table 12. STATUS REGISTER 1 BIT ASSIGNMENTS
Bit
Mnemonic
Function
ALERT
7
BUSY
1 when ADC Converting
No
6
LHIGH
(Note 1)
1 when Local High
Temperature Limit Tripped
Yes
5
LLOW
(Note 1)
1 when Local Low
Temperature Limit Tripped
Yes
4
R1HIGH
(Note 1)
1 when Remote 1 High
Temperature Limit Tripped
Yes
3
R1LOW
(Note 1)
1 when Remote 1 Low
Temperature Limit Tripped
Yes
2
D1 OPEN
(Note 1)
1 when Remote 1 Sensor
Open Circuit
Yes
1
R1THRM1
1 when Remote1 THERM
Limit Tripped
No
0
LTHRM1
1 when Local THERM Limit
Tripped
No
1. These flags stay high until the status register is read, or they are
reset by POR.
Table 13. STATUS REGISTER 2 BIT ASSIGNMENTS
Bit
Mnemonic
Function
ALERT
7
Res
Reserved for Future Use
No
6
Res
Reserved for Future Use
No
5
Res
Reserved for Future Use
No
4
R2HIGH
(Note 1)
1 when Remote 2 High
Temperature Limit Tripped
Yes
3
R2LOW
(Note 1)
1 when Remote 2 Low
Temperature Limit Tripped
Yes
2
D2 OPEN
(Note 1)
1 when Remote 2 Sensor
Open Circuit
Yes
1
R2THRM1
1 when Remote 2 THERM
Limit Tripped
No
0
ALERT
1 when ALERT Condition
Exists
No
1. These flags stay high until the status register is read, or they are
reset by POR.
The eight flags that can generate an ALERT are NOR’d
together, so if any of them are high, the ALERT interrupt
latch is set and the ALERT output goes low (provided they
are not masked out).
Reading the Status 1 register will clear the five flags, Bit 6
to Bit 2 in Status Register 1, provided the error conditions
that caused the flags to be set have gone away. Reading the
Status 2 register will clear the three flags, Bit 4 to Bit 2 in
Status Register 2, provided the error conditions that caused
the flags to be set have gone away. A flag bit can only be reset
if the corresponding value register contains an in-limit
measurement or if the sensor is good.
The ALERT interrupt latch is not reset by reading the
status register. It is reset when the ALERT output has been
serviced by the master reading the device address, provided
the error condition has gone away and the status register flag
bits have been reset.
When Flag 1 and/or Flag 0 of Status Register 1, or Flag 1
of Status Register 2 are set, the THERM output goes low to
indicate that the temperature measurements are outside the
programmed limits. The THERM output does not need to be
reset, unlike the ALERT output. Once the measurements are
within the limits, the corresponding status register bits are
automatically reset and the THERM output goes high. The
user may add hysteresis by programming Register 0x21.
The THERM output will be reset only when the temperature
falls below the THERM limit minus hysteresis.
When Pin 13 is configured as THERM2, only the high
temperature limits are relevant. If Flag 6, Flag 4 of Status
Register 1, or Flag 4 of Status Register 2 are set, the
THERM2 output goes low to indicate that the temperature
measurements are outside the programmed limits. Flag 5
and Flag 3 of Status Register 1, and Flag 3 of Status
Register 2 have no effect on THERM2. The behavior of
THERM2 is otherwise the same as THERM.
Bit 0 of Status Register 2 is set whenever the ALERT
output of the ADT7483A is asserted low. This means that the
user need only read Status Register 2 to determine if the
ADT7483A is responsible for the ALERT. Bit 0 of Status
Register 2 is reset when the ALERT output is reset. If the
ALERT output is masked, then this bit is not set.
Offset Register
Offset errors may be introduced into the remote
temperature measurement by clock noise or by the thermal
diode being located away from the hot spot. To achieve the
specified accuracy on this channel, these offsets must be
removed.
The offset values are stored as 10-bit, twos complement
values:
The Remote 1 offset MSBs are stored in Register 0x11,
and the LSBs are stored 0x12 (low byte, left justified).
The Remote 2 offset MSBs are stored in Register 0x34,
and the LSBs are stored 0x35 (low byte, left justified).
The Remote 2 offset can be written to, or read from, the
Remote 1 offset registers if Bit 3 of the Configuration 1
register is set to 1. This bit should be set to 0 (default)
to read the Remote 1 offset values.
Only the upper 2 bits of the LSB registers are used. The
MSB of the MSB offset registers is the sign bit. The
minimum offset that can be programmed is −128C, and the
maximum is +127.75C.
The value in the offset register is added or subtracted to the
measured value of the remote temperature.
The offset register powers up with a default value of 0C
and will have no effect unless the user writes a different
value to it.


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